5秒后页面跳转
EPA054-100 PDF预览

EPA054-100

更新时间: 2024-11-09 06:57:03
品牌 Logo 应用领域
PCA 延迟线逻辑集成电路
页数 文件大小 规格书
1页 20K
描述
16 Pin DIP 5 Tap TTL Compatible Active Delay Lines

EPA054-100 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Active零件包装代码:DIP
包装说明:DIP, DIP16,.3针数:16/8
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8473.30.51.00风险等级:5.81
Is Samacsys:N其他特性:MAX RISE TIME CAPTURED
系列:TTL输入频率最大值(fmax):10 MHz
JESD-30 代码:R-XDIP-T8JESD-609代码:e0
逻辑集成电路类型:ACTIVE DELAY LINE湿度敏感等级:3
功能数量:1抽头/阶步数:5
端子数量:8最高工作温度:125 °C
最低工作温度:-55 °C输出极性:TRUE
封装主体材料:UNSPECIFIED封装代码:DIP
封装等效代码:DIP16,.3封装形状:RECTANGULAR
封装形式:IN-LINE峰值回流温度(摄氏度):NOT SPECIFIED
电源:5 V最大电源电流(ICC):75 mA
可编程延迟线:NOProp。Delay @ Nom-Sup:100 ns
认证状态:Not Qualified座面最大高度:6.35 mm
子类别:Delay Lines最大供电电压 (Vsup):5.25 V
最小供电电压 (Vsup):4.75 V标称供电电压 (Vsup):5 V
表面贴装:NO技术:TTL
温度等级:MILITARY端子面层:Tin/Lead (Sn/Pb)
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
总延迟标称(td):100 ns宽度:7.62 mm
Base Number Matches:1

EPA054-100 数据手册

  
16 Pin DIP 5 Tap TTL Compatible Active Delay Lines  
TAP DELAYS  
±5% or ±2 nS†  
TOTAL DELAYS  
±5% or ±2 nS†  
PART  
NUMBER  
TAP DELAYS  
±5% or ±2 nS†  
TOTAL DELAYS  
±5% or ±2 nS†  
PART  
NUMBER  
5, 10, 15, 20  
6, 12, 18, 24  
7, 14, 21, 28  
8, 16, 24, 32  
25  
30  
35  
40  
45  
50  
60  
75  
100  
125  
150  
175  
200  
225  
250  
300  
350  
EPA054-25  
EPA054-30  
EPA054-35  
EPA054-40  
EPA054-45  
EPA054-50  
EPA054-60  
EPA054-75  
EPA054-100  
EPA054-125  
EPA054-150  
EPA054-175  
EPA054-200  
EPA054-225  
EPA054-250  
EPA054-300  
EPA054-350  
80, 160, 240, 320  
84, 168, 252, 336  
88, 176, 264, 352  
90, 180, 270, 360  
94, 188, 282, 376  
100, 200, 300, 400  
110, 220, 330, 440  
120, 240, 360, 480  
130, 260, 390, 520  
140, 280, 420, 560  
150, 300, 450, 600  
160, 320, 480, 640  
170, 340, 510, 680  
180, 360, 540, 720  
190, 380, 570, 760  
200, 400, 600, 800  
400  
420  
440  
450  
470  
500  
550  
600  
650  
700  
750  
800  
850  
900  
950  
1000  
EPA054-400  
EPA054-420  
EPA054-440  
EPA054-450  
EPA054-470  
EPA054-500  
EPA054-550  
EPA054-600  
EPA054-650  
EPA054-700  
EPA054-750  
EPA054-800  
EPA054-850  
EPA054-900  
EPA054-950  
EPA054-1000  
9, 18, 27, 36  
10, 20, 30, 40  
12, 24, 36, 48  
15, 30, 45, 60  
20, 40, 60, 80  
25, 50, 75, 100  
30, 60, 90, 120  
35, 70, 105, 140  
40, 80, 120, 160  
45, 90, 135, 180  
50, 100, 150, 200  
60, 120, 180, 240  
70, 140, 210, 280  
Whichever is greater.  
Delay times referenced from input to leading edges at 25°C, 5.0V, with no load.  
DC Electrical Characteristics  
Parameter  
Schematic  
Test Conditions  
Min Max Unit  
V
High-Level Output Voltage  
Low-Level Output Voltage  
Input Clamp Voltage  
V
V
V
V
V
V
V
= min. V = max. I = max 2.7  
OH  
V
V
V
µA  
mA  
mA  
mA  
OH  
CC  
CC  
CC  
CC  
CC  
CC  
CC  
IL  
V
= min. V = min. I = max  
0.5  
-1.2  
50  
1.0  
-2  
OL  
IH OL  
V
I
= min. I = II  
K
IK  
I
16  
14  
12  
10  
6
VCC  
4
OUTPUT  
High-Level Input Current  
= max. V = 2.7V  
IH  
IN  
= max. V = 5.25V  
IN  
I
Low-Level Input Current  
Short Circuit Output Current  
= max. V = 0.5V  
IN  
IL  
INPUT 1  
I
= max. V  
= 0.  
-40  
-100  
OS  
OUT  
(One output at a time)  
I
High-Level Supply Current  
Low-Level Supply Current  
Output Rise Time  
V
V
= max. V = OPEN  
75  
75  
4
mA  
mA  
nS  
CCH  
CC  
CC  
IN  
= max. V = 0  
8
GROUND  
I
CCL  
IN  
T
Td £ 500 nS (0.75 to 2.4 Volts)  
Td > 500 nS  
RO  
5
nS  
N
Fanout High-Level Output  
Fanout Low-Level Output  
V
V
= max. V = 2.7V  
= max. V = 0.5V  
OL  
20 TTL LOAD  
10 TTL LOAD  
H
CC  
CC  
OH  
N
L
Recommended  
Operating Conditions  
Package Dimensions  
Min Max Unit  
V
Supply Voltage  
4.75  
2.0  
5.25  
V
V
V
mA  
mA  
mA  
%
CC  
V
High-Level Input Voltage  
Low-Level Input Voltage  
Input Clamp Current  
High-Level Output Current  
Low-Level Output Current  
Pulse Width of Total Delay  
Duty Cycle  
IH  
V
0.8  
-18  
-1.0  
20  
IL  
IK  
OH  
I
I
I
PCA  
EPA054-25  
Date Code  
.280  
Max.  
OL  
P
*
40  
W
d*  
40  
%
White Dot  
.300  
Pin#1  
.200  
T
Operating Free-Air Temperature  
-55  
+125  
°C  
A
.88 Max.  
*These two values are inter-dependent.  
.020  
.040  
.250  
Max.  
Input Pulse Test Conditions @ 25° C  
Unit  
.010  
Typ.  
.020  
Typ.  
.150 Typ.  
E
Pulse Input Voltage  
3.2  
110  
2.0  
1.0  
100  
5.0  
Volts  
%
nS  
MHz  
KHz  
Volts  
IN  
.365  
Max.  
P
Pulse Width % of Total Delay  
Pulse Rise Time (0.75 - 2.4 Volts)  
Pulse Repetition Rate @ Td £ 200 nS  
Pulse Repetition Rate @ Td > 200 nS  
Supply Voltage  
W
T
RI  
P
RR  
V
CC  
QAF-CSO1 Rev. B 8/25/94  
DSA054 Rev. A 2/5/96  
Unless Otherwise Noted Dimensions in Inches  
Tolerances:  
16799 SCHOENBORN ST.  
NORTH HILLS, CA 91343  
TEL: (818) 892-0761  
Fractional = ± 1/32  
E L E C T R O N I C S I N C .  
.XX = ± .030  
.XXX = ± .010  
FAX: (818) 894-5791  

与EPA054-100相关器件

型号 品牌 获取价格 描述 数据表
EPA054-1000 PCA

获取价格

16 Pin DIP 5 Tap TTL Compatible Active Delay Lines
EPA054-125 PCA

获取价格

16 Pin DIP 5 Tap TTL Compatible Active Delay Lines
EPA054-150 PCA

获取价格

16 Pin DIP 5 Tap TTL Compatible Active Delay Lines
EPA054-175 PCA

获取价格

16 Pin DIP 5 Tap TTL Compatible Active Delay Lines
EPA054-200 PCA

获取价格

16 Pin DIP 5 Tap TTL Compatible Active Delay Lines
EPA054-225 PCA

获取价格

16 Pin DIP 5 Tap TTL Compatible Active Delay Lines
EPA054-25 PCA

获取价格

16 Pin DIP 5 Tap TTL Compatible Active Delay Lines
EPA054-250 PCA

获取价格

16 Pin DIP 5 Tap TTL Compatible Active Delay Lines
EPA054-30 PCA

获取价格

16 Pin DIP 5 Tap TTL Compatible Active Delay Lines
EPA054-300 PCA

获取价格

16 Pin DIP 5 Tap TTL Compatible Active Delay Lines