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EP4S100G3F45I3N PDF预览

EP4S100G3F45I3N

更新时间: 2024-11-30 19:17:31
品牌 Logo 应用领域
英特尔 - INTEL 时钟可编程逻辑
页数 文件大小 规格书
82页 1455K
描述
Field Programmable Gate Array, 116480 CLBs, 717MHz, 291200-Cell, CMOS, PBGA1932, LEAD FREE, FBGA-1932

EP4S100G3F45I3N 技术参数

是否Rohs认证: 符合生命周期:End Of Life
包装说明:LEAD FREE, FBGA-1932Reach Compliance Code:compliant
ECCN代码:3A001.A.7.AHTS代码:8542.39.00.01
风险等级:5.31最大时钟频率:717 MHz
JESD-30 代码:S-PBGA-BJESD-609代码:e1
长度:45 mm可配置逻辑块数量:116480
输入次数:781逻辑单元数量:291200
输出次数:781端子数量:1932
组织:116480 CLBS封装主体材料:PLASTIC/EPOXY
封装代码:BGA封装等效代码:BGA1932,44X44,40
封装形状:SQUARE封装形式:GRID ARRAY
峰值回流温度(摄氏度):245电源:0.95,1.2/3,1.5,2.5 V
可编程逻辑类型:FIELD PROGRAMMABLE GATE ARRAY认证状态:Not Qualified
座面最大高度:3.6 mm子类别:Field Programmable Gate Arrays
最大供电电压:0.98 V最小供电电压:0.92 V
标称供电电压:0.95 V表面贴装:YES
技术:CMOS端子面层:Tin/Silver/Copper (Sn/Ag/Cu)
端子形式:BALL端子节距:1 mm
端子位置:BOTTOM处于峰值回流温度下的最长时间:40
宽度:45 mmBase Number Matches:1

EP4S100G3F45I3N 数据手册

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Stratix IV Device Handbook  
Volume 4: Device Datasheet and Addendum  
101 Innovation Drive  
San Jose, CA 95134  
www.altera.com  
SIV5V4-5.7  

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This section provides a complete overview of all features relating to the Stratix IV devic
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Field Programmable Gate Array, 141440 CLBs, PBGA1932, FBGA-1932
EP4S100G4F45C1N INTEL

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Field Programmable Gate Array, 141440 CLBs, PBGA1932, LEAD FREE, FBGA-1932
EP4S100G4F45C2 INTEL

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Field Programmable Gate Array, 141440 CLBs, PBGA1932, FBGA-1932
EP4S100G4F45C3N INTEL

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Field Programmable Gate Array, 141440 CLBs, PBGA1932, LEAD FREE, FBGA-1932
EP4S100G4F45I1N INTEL

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Field Programmable Gate Array, 141440 CLBs, 353600-Cell, CMOS, PBGA1932, LEAD FREE, FBGA-1
EP4S100G4F45I2 INTEL

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Field Programmable Gate Array, 141440 CLBs, 800MHz, 353600-Cell, CMOS, PBGA1932, FBGA-1932
EP4S100G4F45I2N INTEL

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Field Programmable Gate Array, 141440 CLBs, 800MHz, 353600-Cell, CMOS, PBGA1932, LEAD FREE
EP4S100G4F45I3N INTEL

获取价格

Field Programmable Gate Array, 141440 CLBs, 717MHz, 353600-Cell, CMOS, PBGA1932, LEAD FREE