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EP4S100G2F40I2N PDF预览

EP4S100G2F40I2N

更新时间: 2024-11-30 19:17:31
品牌 Logo 应用领域
英特尔 - INTEL 时钟LTE可编程逻辑
页数 文件大小 规格书
82页 1455K
描述
Field Programmable Gate Array, 91200 CLBs, 800MHz, 228000-Cell, CMOS, PBGA1517, LEAD FREE, FBGA-1517

EP4S100G2F40I2N 技术参数

是否Rohs认证: 符合生命周期:End Of Life
包装说明:BGA, BGA1517,39X39,40Reach Compliance Code:compliant
ECCN代码:3A001.A.7.AHTS代码:8542.39.00.01
风险等级:5.3最大时钟频率:800 MHz
JESD-30 代码:S-PBGA-BJESD-609代码:e1
长度:40 mm湿度敏感等级:3
可配置逻辑块数量:91200输入次数:654
逻辑单元数量:228000输出次数:654
端子数量:1517组织:91200 CLBS
封装主体材料:PLASTIC/EPOXY封装代码:BGA
封装等效代码:BGA1517,39X39,40封装形状:SQUARE
封装形式:GRID ARRAY峰值回流温度(摄氏度):245
电源:0.95,1.2/3,1.5,2.5 V可编程逻辑类型:FIELD PROGRAMMABLE GATE ARRAY
认证状态:Not Qualified座面最大高度:3.8 mm
子类别:Field Programmable Gate Arrays最大供电电压:0.98 V
最小供电电压:0.92 V标称供电电压:0.95 V
表面贴装:YES技术:CMOS
端子面层:TIN SILVER COPPER端子形式:BALL
端子节距:1 mm端子位置:BOTTOM
处于峰值回流温度下的最长时间:40宽度:40 mm
Base Number Matches:1

EP4S100G2F40I2N 数据手册

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Stratix IV Device Handbook  
Volume 4: Device Datasheet and Addendum  
101 Innovation Drive  
San Jose, CA 95134  
www.altera.com  
SIV5V4-5.7  

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