Datasheet > EP3C80U484I6N

EP3C80U484I6N

更新时间： 2023-01-15 00:00:00

品牌	Logo	应用领域
英特尔 - INTEL		栅
页数	文件大小	规格书
10页	235K
描述
Field Programmable Gate Array, 81264-Cell, CMOS, PBGA484, 19 X 19 MM, 2.20 MM HEIGHT, 0.80 MM PITCH, LEAD FREE, UBGA-484

阅读下载

中文翻译

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

EP3C80U484I6N 数据手册

1. Cyclone III Device Family Overview

CIII51001-1.1

The Cyclone^®III FPGA family offered by Altera is a cost-optimized, memory-rich FPGA family.

Cyclone III FPGAs are built on TSMC's 65-nm low-power (LP) process technology with additional

silicon optimizations and software features to minimize power consumption. With this third

generation in the Cyclone series, Altera broadens the number of high volume, cost-sensitive

applications that can benefit from FPGAs.

Cyclone III:

Lowest

System-Cost

FPGAs

This chapter contains the following sections:

■

“Cyclone III Device Features” on page 1–1

“Cyclone III Device Architecture” on page 1–4

“Reference and Ordering Information” on page 1–9

Cyclone III devices are designed to offer low-power consumption and increased system integration

at reduced cost.

Cyclone III

Device Features

Reduced Cost

Cyclone III devices deliver the lowest device and system costs based on the following facts:

■

Staggered I/O ring to lower die area

Wide range of low cost packages

Support for low-cost serial flash and commodity parallel flash devices for configuration

Lowest-Power 65-nm FPGA

Cyclone III devices are the lowest-power 65-nm FPGAs designed via TSMC’s 65-nm low power

process and Altera’s power aware design flow. Cyclone III devices support hot-socketing operation;

therefore, unused I/O banks can be powered down when the devices to which they are connected are

turned off. Benefits of the Cyclone III device's low-power operation include:

■

Extended battery life for portable and handheld applications

Enabled operation in thermally challenged environments

Eliminated or reduced cooling system costs

Increased System Integration

Cyclone III devices provide increased system integration by offering the following features:

■

Density is up to 119,088 logic elements (LEs) and memory is up to 3.8 Mbits. Refer to Table 1–1

on page 1–2.

■

High memory to logic ratio for embedded DSP applications

Highest multiplier-to-logic ratio in the industry at every density; 260 MHz multiplier

performance

■

High I/O count, low- and mid-range density devices for user I/O constrained applications

Up to four phase-locked loops (PLLs) provide robust clock management and synthesis for device

clocks, external system clocks, and I/O interfaces

●

Up to five outputs per PLL

●

Cascadable to save I/Os, ease PCB routing, and reduce the number of external reference

clocks needed

●

Dynamically reconfigurable to change phase shift, frequency multiplication/division, and

input frequency in-system without reconfiguring the device

Altera Corporation

July 2007

1–1

Preliminary

12 3 4 5 6 7...10

中文翻译

下载PDF

与EP3C80U484I6N相关器件

型号	品牌	获取价格	描述	数据表
EP3C80U484I7N	ALTERA	获取价格	Field Programmable Gate Array, 81264 CLBs, 472.5MHz, 81264-Cell, CMOS, PBGA484, 19 X 19 MM
EP3C80U484I7N	INTEL	获取价格	Field Programmable Gate Array, 81264 CLBs, 472.5MHz, 81264-Cell, CMOS, PBGA484, 19 X 19 MM
EP3C80U484I8	INTEL	获取价格	Field Programmable Gate Array, 81264-Cell, CMOS, PBGA484, 19 X 19 MM, 2.20 MM HEIGHT, 0.80
EP3C80U484I8N	INTEL	获取价格	Field Programmable Gate Array, 81264-Cell, CMOS, PBGA484, 19 X 19 MM, 2.20 MM HEIGHT, 0.80
EP3CLS100	ALTERA	获取价格	Cyclone III Device Handbook
EP3CLS100F484C7N	INTEL	获取价格	Field Programmable Gate Array, 100448 CLBs, 450MHz, 100448-Cell, CMOS, PBGA484, LEAD FREE,
EP3CLS100F484C8N	INTEL	获取价格	Field Programmable Gate Array, 100448 CLBs, 450MHz, 100448-Cell, CMOS, PBGA484, LEAD FREE,
EP3CLS100F780I7N	INTEL	获取价格	Field Programmable Gate Array, 100448 CLBs, 450MHz, 100448-Cell, CMOS, PBGA780, LEAD FREE,
EP3CLS100U484C8N	INTEL	获取价格	Field Programmable Gate Array, 100448 CLBs, 450MHz, 100448-Cell, CMOS, PBGA484, LEAD FREE,
EP3CLS100U484I7N	INTEL	获取价格	Field Programmable Gate Array, 100448 CLBs, 450MHz, 100448-Cell, CMOS, PBGA484, LEAD FREE,

与EP3C80U484I6N相关文章

REF70数据手册解读：高精度电压参考源的全面剖析
2024-07-08

2
解析30211801数据手册：PCB端子排MKDSV 5/3-9.5
2024-07-08

1
UL248-14数据手册深度解读：微型保险丝的全面剖析
2024-07-08

3
BSS138LT3G：一款高效能N沟道MOSFET的全面解析
2024-07-04

18

产品中心

服务支持

精选活动

关于我们

帮助中心

EP3C80U484I6N

EP3C80U484I6N 数据手册

与EP3C80U484I6N相关器件

与EP3C80U484I6N相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

EP3C80U484I6N

EP3C80U484I6N 数据手册

与EP3C80U484I6N相关器件

与EP3C80U484I6N相关文章

您还可以找

您在本页遇到什么问题？