Datasheet > EN25F40A-104XIP

EN25F40A-104XIP

更新时间： 2024-09-24 14:49:59

品牌	Logo	应用领域
晶豪 - ESMT		/
页数	文件大小	规格书
67页	1260K
描述
Flash Memory,

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EN25F40A-104XIP 技术参数

生命周期：	Contact Manufacturer	包装说明：	,
Reach Compliance Code：	unknown	风险等级：	5.77
Base Number Matches：	1

EN25F40A-104XIP 数据手册

EN25F40A

4 Megabit Serial Flash Memory with 4Kbyte Uniform Sector

FEATURES

- Write Protect all or portion of memory via

software

- Enable/Disable protection with WP# pin

• Single power supply operation

- Full voltage range: 2.7-3.6 volt

• Serial Interface Architecture

- SPI Compatible: Mode 0 and Mode 3

• High performance program/erase speed

- Page program time: 0.8ms typical

- Sector erase time: 30ms typical

- 32KB Block erase time 100ms typical

- 64KB Block erase time 200ms typical

- Chip erase time: 1.5 seconds typical

• 4 M-bit Serial Flash

- 4 M-bit/512 K-byte/2,048 pages

- 256 bytes per programmable page

• Standard, Dual or Quad SPI

- Standard SPI: CLK, CS#, DI, DO, WP#, HOLD#

- Dual SPI: CLK, CS#, DQ₀, DQ₁, WP#, HOLD#

- Quad SPI: CLK, CS#, DQ₀, DQ₁, DQ₂, DQ₃

• Lockable 512 byte OTP security sector

• Support Serial Flash Discoverable Parameters

(SFDP) signature

• High performance

• Read Unique ID Number

- 104MHz clock rate for Standard SPI

- 104MHz clock rate for two data bits

- 104MHz clock rate for four data bits

• Minimum 100K endurance cycle

• Data retention time 20years

• Low power consumption

- 10mA typical active current

- 1 µA typical power down current

• Package Options

- 8 pins SOP 150mil body width

- 8 pins VSOP 150mil body width

- 8 contact USON 2x3 mm

- 8 contact VDFN 5x6 mm

- All Pb-free packages are compliant RoHS,

Halogen-Free and REACH.

• Uniform Sector Architecture:

- 128 sectors of 4-Kbyte

- 16 blocks of 32-Kbyte

- 8 blocks of 64-Kbyte

- Any sector or block can be erased individually

• Industrial temperature Range

• Software and Hardware Write Protection:

GENERAL DESCRIPTION

The EN25F40A is a 4 Megabit (512 K-byte) Serial Flash memory, with enhanced write protection

mechanisms. The EN25F40A supports the standard Serial Peripheral Interface (SPI), and a high

performance Dual/Quad output as well as Dual/Quad I/O using SPI pins: Serial Clock, Chip Select,

Serial DQ₀(DI), DQ₁(DO), DQ₂(WP#) and DQ₃(HOLD#). SPI clock frequencies of up to 104MHz are

supported allowing equivalent clock rates of 208MHz (104MHz x 2) for Dual Output and 416MHz

(104MHz x 4) for Quad Output when using the Dual/Quad I/O Fast Read instructions. The memory can

be programmed 1 to 256 bytes at a time, using the Page Program instruction.

The EN25F40A is designed to allow either single Sector/Block at a time or full chip erase operation. The

EN25F40A can be configured to protect part of the memory as the software protected mode. The device

can sustain a minimum of 100K program/erase cycles on each sector or block

This Data Sheet may be revised by subsequent versions

or modifications due to changes in technical specifications.

Elite Semiconductor Memory Technology Inc.

Rev. D, Issue Date: 2017/02/13

12 3 4 5 6 7...67

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