Datasheet > EMZB08P03G

EMZB08P03G

更新时间： 2024-05-23 22:23:40

品牌	Logo	应用领域
杰力科技 - EXCELLIANCE		/
页数	文件大小	规格书
5页	183K
描述
SOP-8

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EMZB08P03G 数据手册

EMZB08P03G

P‐Channel Logic Level Enhancement Mode Field Effect Transistor

Product Summary:

BV^DSS

‐30V

8.5mΩ

‐15A

DSON (MAX.)

UIS, Rg 100% Tested

Pb‐Free Lead Plating & Halogen Free

ESD Protection

ABSOLUTE MAXIMUM RATINGS (T_A= 25 °C Unless Otherwise Noted)

PARAMETERS/TEST CONDITIONS

SYMBOL

LIMITS

±20

‐15

UNIT

Gate‐Source Voltage

V_GS

T_C= 25 °C

Continuous Drain Current

I_D

T_C= 100 °C

‐11

Pulsed Drain Current¹

I_DM

I_AS

‐60

Avalanche Current

‐25

L = 0.1mH, I

D=‐25A, RG=25Ω

Avalanche Energy

Power Dissipation

E_AS

31.25

2.5

T_A= 25 °C

P_D

T_A= 100 °C

Operating Junction & Storage Temperature Range

T_j, T_stg

‐55 to 150

°C

100% UIS testing in condition of V_D=‐15V, L=0.1mH, V_G=‐10V, I_L=‐15A, Rated V_DS=‐30V P‐CH

THERMAL RESISTANCE RATINGS

THERMAL RESISTANCE

SYMBOL

R_JC

TYPICAL

MAXIMUM

UNIT

Junction‐to‐Case

Junction‐to‐Ambient³

°C / W

R_JA

¹Pulse width limited by maximum junction temperature.

²Duty cycle  1％

³50°C / W when mounted on a 1 in²pad of 2 oz copper.

2015/8/5

p.1

12 3 4 5

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