Datasheet > EMP19K03HPC

EMP19K03HPC

更新时间： 2024-09-25 17:15:35

品牌	Logo	应用领域
杰力科技 - EXCELLIANCE		/
页数	文件大小	规格书
10页	755K
描述
EDFN5X6

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EMP19K03HPC 数据手册

EMP19K03HPC

Dual N-Channel Logic Level Enhancement Mode Field Effect Transistor

▪Product Summary:

▪ Pin Description:

30V

BVDSS

R_{DSON (MAX.)}@V_GS=10V

R_{DSON (MAX.)}@V_GS=4.5V

I_D@T_C=25℃

6.6mΩ

8.8mΩ

47.0A

16.0A

2.4mΩ

3.4mΩ

93.0A

27.0A

I_D@T_A=25℃

Dual N Channel MOSFET

UIS, Rg 100% Tested

Pb-Free Lead Plating & Halogen Free

▪ABSOLUTE MAXIMUM RATINGS (T_C= 25 °C Unless Otherwise Noted)

PARAMETERS/TEST CONDITIONS SYMBOL

Gate-Source Voltage

LIMITS

UNIT

V_GS

I_D

±20

T_C= 25 °C

T_C= 100 °C

T_A= 25 °C

T_A= 70 °C

Continuous Drain Current

I_D

Continuous Drain Current

Pulsed Drain Current¹

Avalanche Current

I_DM

I_AS

158

Avalanche Energy

L = 0.1mH

L = 0.05mH

T_C= 25 °C

T_C= 100 °C

T_A= 25 °C

T_A= 70 °C

EAS

EAR

57.8

28.9

3.1

211.3

105.6

35.7

14.3

3.1

Repetitive Avalanche Energy²

P_D

Power Dissipation

P_D

Power Dissipation

°C

Operating Junction & Storage Temperature Range

T_j, T_stg

-55 to 150

▪100% UIS testing in condition of VD=15V, L=0.1mH, VG=10V, IL=21A, Rated VDS=30V N-CH_Q1

▪100% UIS testing in condition of VD=15V, L=0.1mH, VG=10V, IL=39A, Rated VDS=30V N-CH_Q2

▪THERMAL RESISTANCE RATINGS

MAXIMUM

THERMAL RESISTANCE

Junction-to-Case

Junction-to-Ambient³

SYMBOL

TYPICAL

UNIT

3.5

R_θJC

R_θJA

t≦10s

Steady-State

°C/W

¹Pulse width limited by maximum junction temperature.

²Duty cycle < 1％

³65°C / W when mounted on a 1 in²pad of 2 oz copper.

⁴Guarantee by Engineering test

2020/8/12

A.1

P.1

12 3 4 5 6 7...10

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