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EMFA0P02JS PDF预览

EMFA0P02JS

更新时间: 2024-11-07 17:15:39
品牌 Logo 应用领域
杰力科技 - EXCELLIANCE /
页数 文件大小 规格书
6页 164K
描述
SOT23-3

EMFA0P02JS 数据手册

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EMFA0P02JS  
P-Channel Logic Level Enhancement Mode Field Effect Transistor  
Product Summary:  
D
BVDSS  
-20V  
100mΩ  
-3.4A  
R
DSON (MAX.)  
G
I
D
S
Pb-Free Lead Plating & Halogen Free  
ABSOLUTE MAXIMUM RATINGS (TA = 25 °C Unless Otherwise Noted)  
PARAMETERS/TEST CONDITIONS  
SYMBOL  
LIMITS  
±12  
UNIT  
Gate-Source Voltage  
VGS  
V
TA = 25 °C  
-3.4  
Continuous Drain Current  
ID  
TA = 70 °C  
-2.4  
A
Pulsed Drain Current1  
IDM  
-14  
TA = 25 °C  
1.04  
Power Dissipation  
PD  
W
°C  
TA = 70 °C  
0.66  
Operating Junction & Storage Temperature Range  
Tj, Tstg  
-55 to 150  
THERMAL RESISTANCE RATINGS  
THERMAL RESISTANCE  
SYMBOL  
RθJA  
RθJA  
TYPICAL  
MAXIMUM  
UNIT  
83  
(
T ≤ 10sec  
)
Junction-to-Ambient3  
°C / W  
120  
(
Steady State  
)
1Pulse width limited by maximum junction temperature.  
2Duty cycle 1%  
3The device mounted on a 1 in2 pad of 2 oz copper.  
2018/8/13  
p.1  

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