Datasheet > EMF60P02J

EMF60P02J

更新时间： 2024-11-06 17:15:55

品牌	Logo	应用领域
杰力科技 - EXCELLIANCE		/
页数	文件大小	规格书
6页	166K
描述
SOT23-3

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中文翻译

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EMF60P02J 数据手册

EMF60P02J

P-Channel Logic Level Enhancement Mode Field Effect Transistor

Product Summary:

BV^DSS

-20V

60mΩ

-4A

DSON (MAX.)

Pb-Free Lead Plating & Halogen Free

ABSOLUTE MAXIMUM RATINGS (T_A= 25 °C Unless Otherwise Noted)

PARAMETERS/TEST CONDITIONS

SYMBOL

LIMITS

±12

-4

UNIT

Gate-Source Voltage

V_GS

T_A= 25 °C

Continuous Drain Current

I_D

T_A= 70 °C

-2.8

-16

Pulsed Drain Current¹

I_DM

T_A= 25 °C

1.25

Power Dissipation

P_D

°C

T_A= 70 °C

0.8

Operating Junction & Storage Temperature Range

T_j, T_stg

-55 to 150

THERMAL RESISTANCE RATINGS

THERMAL RESISTANCE

Junction-to-Ambient³

Junction-to-Lead⁴

SYMBOL

R_θJA

TYPICAL

MAXIMUM

UNIT

100

°C / W

R_θJL

¹Pulse width limited by maximum junction temperature.

²Duty cycle ≤ 1％

³100°C / W when mounted on a 1 in²pad of 2 oz copper.

⁴R_θJAis the sum of the thermal impedance from junction to lead R_θJLand lead to ambient.

2018/8/9

p.1

12 3 4 5 6

中文翻译

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