Datasheet > EMF50N03J

EMF50N03J

更新时间： 2024-11-19 17:15:27

品牌	Logo	应用领域
杰力科技 - EXCELLIANCE		/
页数	文件大小	规格书
6页	398K
描述
SOT23-3

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中文翻译

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数据手册

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EMF50N03J 数据手册

EMF50N03J

N-Channel Logic Level Enhancement Mode Field Effect Transistor

Product Summary:

BVDSS

RDSON (MAX.)

30V

50mΩ

3.5A

Pb-Free Lead Plating & Halogen Free

ABSOLUTE MAXIMUM RATINGS (T_A= 25 °C Unless Otherwise Noted)

PARAMETERS/TEST CONDITIONS

SYMBOL

LIMITS

±12

3.5

UNIT

Gate-Source Voltage

V_GS

T_A= 25 °C

Continuous Drain Current

I_D

T_A= 70 °C

2.4

Pulsed Drain Current¹

I_DM

T_A= 25 °C

1.25

Power Dissipation

P_D

°C

T_A= 70 °C

0.8

Operating Junction & Storage Temperature Range

T_j, T_stg

-55 to 150

THERMAL RESISTANCE RATINGS

THERMAL RESISTANCE

Junction-to-Ambient³

Junction-to-Lead⁴

SYMBOL

R_JA

TYPICAL

MAXIMUM

UNIT

100

°C / W

R_JL

¹Pulse width limited by maximum junction temperature.

²Duty cycle  1％

³100°C / W when mounted on a 1 in²pad of 2 oz copper.

⁴R_JAis the sum of the thermal impedance from junction to lead R_JLand lead to ambient.

2022/6/13

p.1

12 3 4 5 6

中文翻译

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