Datasheet > EMB50N10G

EMB50N10G

更新时间： 2024-05-23 22:23:31

品牌	Logo	应用领域
杰力科技 - EXCELLIANCE		/
页数	文件大小	规格书
5页	177K
描述
SOP-8

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中文翻译

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数据手册

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EMB50N10G 数据手册

EMB50N10G

N‐Channel Logic Level Enhancement Mode Field Effect Transistor

Product Summary:

BV^DSS

100V

50mΩ

DSON (MAX.)

UIS, Rg 100% Tested

Pb‐Free Lead Plating & Halogen Free

ABSOLUTE MAXIMUM RATINGS (T_A= 25 °C Unless Otherwise Noted)

PARAMETERS/TEST CONDITIONS

SYMBOL

LIMITS

±20

UNIT

Gate‐Source Voltage

V_GS

T_A= 25 °C

Continuous Drain Current

I_D

T_A= 100 °C

Pulsed Drain Current¹

I_DM

I_AS

Avalanche Current

L = 0.1mH, ID=15A, RG=25Ω

L = 0.05mH

Avalanche Energy

E_AS

E_AR

11.25

5.62

2.5

Repetitive Avalanche Energy²

T_A= 25 °C

Power Dissipation

P_D

°C

T_A= 100 °C

Operating Junction & Storage Temperature Range

T_j, T_stg

‐55 to 150

THERMAL RESISTANCE RATINGS

THERMAL RESISTANCE

SYMBOL

R_JC

TYPICAL

MAXIMUM

UNIT

Junction‐to‐Case

°C / W

Junction‐to‐Ambient

R_JA

¹Pulse width limited by maximum junction temperature.

²Duty cycle  1％

2013/3/26

p.1

12 3 4 5

中文翻译

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