Datasheet > EMB50B03G

EMB50B03G

更新时间： 2024-09-25 17:15:27

品牌	Logo	应用领域
杰力科技 - EXCELLIANCE		/
页数	文件大小	规格书
5页	216K
描述
SOP-8

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中文翻译

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数据手册

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EMB50B03G 数据手册

EMB50B03G

Dual P‐Channel Logic Level Enhancement Mode Field Effect Transistor

Product Summary:

BV^DSS

‐30V

50mΩ

‐5A

DSON (MAX.)

Pb‐Free Lead Plating & Halogen Free

ABSOLUTE MAXIMUM RATINGS (T_A= 25 °C Unless Otherwise Noted)

PARAMETERS/TEST CONDITIONS

SYMBOL

LIMITS

±20

‐5

UNIT

Gate‐Source Voltage

V_GS

T_A= 25 °C

Continuous Drain Current

I_D

T_A= 100 °C

‐4

Pulsed Drain Current¹

I_DM

‐20

T_A= 25 °C

Power Dissipation

P_D

°C

T_A= 100 °C

0.8

Operating Junction & Storage Temperature Range

T_j, T_stg

‐55 to 150

THERMAL RESISTANCE RATINGS

THERMAL RESISTANCE

SYMBOL

R_JC

TYPICAL

MAXIMUM

UNIT

Junction‐to‐Case

Junction‐to‐Ambient³

°C / W

62.5

R_JA

¹Pulse width limited by maximum junction temperature.

²Duty cycle  1％

³62.5°C / W when mounted on a 1 in²pad of 2 oz copper.

2012/10/25

p.1

12 3 4 5

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