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EMB32C03V PDF预览

EMB32C03V

更新时间: 2024-09-25 17:15:27
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杰力科技 - EXCELLIANCE /
页数 文件大小 规格书
9页 889K
描述
EDFN3X3

EMB32C03V 数据手册

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EMB32C03V  
N & P-Channel Logic Level Enhancement Mode Field Effect Transistor  
Product Summary:  
N-CH  
30V  
P-CH  
-30V  
BVDSS  
32mΩ  
45mΩ  
6A  
55mΩ  
85mΩ  
-5A  
RDSON (MAX.) @VGS=10V  
RDSON (MAX.) @VGS=4.5V  
ID@TA=25°C  
N+P Channel MOSFET  
UIS, Rg 100% Tested  
Pb-Free Lead Plating & Halogen Free  
ABSOLUTE MAXIMUM RATINGS (TA = 25 °C Unless Otherwise Noted)  
PARAMETERS/TEST CONDITIONS  
SYMBOL  
LIMITS  
UNIT  
Gate-Source Voltage  
VGS  
N-CH  
±20  
6
P-CH  
±20  
-5  
V
TA = 25 °C  
Continuous Drain Current  
ID  
TA = 100 °C  
4
-3  
A
Pulsed Drain Current1  
IDM  
IAS  
24  
-20  
22  
Avalanche Current  
15  
L = 0.1mH  
Avalanche Energy  
EAS  
EAR  
11  
24  
mJ  
Repetitive Avalanche Energy2  
L = 0.05Mh  
TA = 25 °C  
TA = 100 °C  
5.6  
12  
2.3  
0.9  
Power Dissipation  
PD  
W
°C  
Operating Junction & Storage Temperature Range  
Tj, Tstg  
-55 to 150  
THERMAL RESISTANCE RATINGS  
THERMAL RESISTANCE  
SYMBOL  
RJC  
TYPICAL  
MAXIMUM  
UNIT  
Junction-to-Case  
7.5  
55  
°C / W  
Junction-to-Ambient3  
RJA  
1Pulse width limited by maximum junction temperature.  
2Duty cycle 1%  
355°C / W when mounted on a 1 in2 pad of 2 oz copper.  
2019/7/31  
p.1