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EMB18C03H PDF预览

EMB18C03H

更新时间: 2024-11-19 17:15:51
品牌 Logo 应用领域
杰力科技 - EXCELLIANCE /
页数 文件大小 规格书
10页 563K
描述
EDFN5X6

EMB18C03H 数据手册

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EMB18C03H  
N-Channel + P Channel Logic Level Enhancement Mode Field Effect Transistor  
▪Product Summary:  
▪ Pin Description:  
N-CH  
30 V  
18 mΩ  
26 mΩ  
28 A  
P-CH  
-30 V  
33 mΩ  
48 mΩ  
-22 A  
-6 A  
BVDSS  
RDSON (MAX.)@VGS=10V  
RDSON (MAX.)@VGS=4.5V  
ID @TC=25  
ID @TA=25℃  
8 A  
N Channel + P Channel MOSFET  
UIS, Rg 100% Tested  
Pb-Free Lead Plating & Halogen Free  
▪ABSOLUTE MAXIMUM RATINGS (TC = 25 °C Unless Otherwise Noted)  
LIMITS  
PARAMETERS/TEST CONDITIONS  
Gate-Source Voltage  
SYMBOL  
UNIT  
N-CH  
±20  
28  
P-CH  
±20  
-22  
-14  
-6  
VGS  
ID  
V
TC = 25 °C  
TC = 100 °C  
TA = 25 °C  
TA = 70 °C  
Continuous Drain Current  
18  
8
6
45  
ID  
Continuous Drain Current  
A
-5  
Pulsed Drain Current1  
Avalanche Current  
IDM  
IAS  
EAS  
EAR  
-36  
-35  
61.25  
30.63  
25  
24  
Avalanche Energy  
L = 0.1mH  
L = 0.05mH  
TC = 25 °C  
TC = 100 °C  
TA = 25 °C  
TA = 70 °C  
28.8  
14.4  
25  
mJ  
W
Repetitive Avalanche Energy2  
PD  
Power Dissipation  
10  
2
1.3  
10  
2
PD  
Power Dissipation  
W
°C  
1.3  
-55 to 150  
Operating Junction & Storage Temperature Range  
Tj, Tstg  
100% UIS testing in condition of VD=15V, L=0.1mH, VG=10V, IL=15A, Rated VDS=30V N-CH  
100% UIS testing in condition of VD=15V, L=0.1mH, VG=10V, IL=21A, Rated VDS=-30V P-CH  
▪THERMAL RESISTANCE RATINGS  
MAXIMUM  
N-CH P-CH  
THERMAL RESISTANCE  
Junction-to-Case  
Junction-to-Ambient3  
SYMBOL  
TYPICAL  
UNIT  
RθJC  
RθJA  
5
5
°C/W  
62.5  
62.5  
1Pulse width limited by maximum junction temperature.  
2Duty cycle < 1%  
362.5°C / W when mounted on a 1 in2 pad of 2 oz copper.  
4Guarantee by Engineering test  
2020/7/28  
A.1  
P.1  

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