Datasheet > EM637327

EM637327

更新时间： 2024-01-07 22:08:35

品牌	Logo	应用领域
钰创 - ETRON		/
页数	文件大小	规格书
78页	1161K
描述
1Mega x 32 SGRAM

阅读下载

中文翻译

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

EM637327 数据手册

EtronTech

EM637327

1Mega x 32 SGRAM

Preliminary (08/99)

Features

Pin Assignment (Top View)

Fast access time from clock: 4.5/5.5/5.5/6 ns

Fast clock rate: 200/166/143/125 MHz

Fully synchronous operation

Internal pipelined architecture

Dual internal banks (512K x 32bit x 2bank)

Programmable Mode

DQ3

VDDQ

DQ4

DQ5

SSQ

DQ6

DQ7

DQ28

VDDQ

DQ27

DQ26

SSQ

DQ25

DQ24

VDDQ

DQ15

DQ14

VSSQ

DQ13

DQ12

VDDQ

VSS

VDDQ

DQ16

DQ17

VSSQ

DQ18

DQ19

VDDQ

VDD

- CAS# Latency: 1, 2, or 3

- Burst Length: 1, 2, 4, 8, or full page

- Burst Type: interleaved or linear burst

- Burst-Read-Single-Write

- Load Color or Mask register

Burst stop function

Individual byte controlled by DQM0-3

Block write and write-per-bit capability

Auto Refresh and Self Refresh

2048 refresh cycles/32ms

DQ20

DQ21

VSSQ

DQ22

DQ23

VDDQ

DQM0

DQM2

WE#

DQ11

DQ10

VSSQ

DQ9

DQ8

VDDQ

DQM3

DQM1

CLK

CKE

DSF

CAS#

RAS#

CS0#

A8 (AP)

Single +3.3V ± 0.3V power supply

Interface: LVTTL

JEDEC 100-pin Plastic package

- QFP (body thickness=2.8mm)

- TQFP1.4 (body thickness=1.4mm)

Overview

The EM637327 SGRAM is a high-speed CMOS

synchronous graphics DRAM containing 32 Mbits. It is

internally configured as a dual 512K x 32 DRAM with a

synchronous interface (all signals are registered on the

positive edge of the clock signal, CLK). Each of the

512K x 32 bit banks is organized as 2048 rows by 256

columns by 32 bits. Read and write accesses to the

SGRAM are burst oriented; accesses start at a selected

location and continue for a programmed number of

locations in a programmed sequence. Accesses begin

with the registration of a BankActivate command which

is then followed by a Read or Write command.

Key Specifications

EM637327

- 5/6/7/8

5/6/7/8 ns

Clock Cycle time(min.)

t_CK3

25/30/35/40 ns

4.5/5.5/5.5/6 ns

55/60/63/72 ns

Row Active time(max.)

t_RAS

t_AC3

t_RC

Access time from CLK(max.)

Row Cycle time(min.)

The EM637327 provides for programmable Read

or Write burst lengths of 1, 2, 4, 8, or full page, with a

burst termination option. An auto precharge function

may be enabled to provide a self-timed row precharge

that is initiated at the end of the burst sequence. The

refresh functions, either Auto or Self Refresh are easy

to use.

Ordering Information

Part Number

EM637327Q-5

EM637327TQ-5

EM637327Q-6

EM637327TQ-6

EM637327Q-7

EM637327TQ-7

EM637327Q-8

EM637327TQ-8

Frequency

200 MHz

166 MHz

143 MHz

125 MHz

Package

QFP

TQFP1.4

QFP

TQFP1.4

QFP

By having a programmable mode register, the

system can choose the most suitable modes to

maximize its performance. These devices are well

suited for applications requiring high memory

bandwidth.

TQFP1.4

QFP

TQFP1.4

Etron Technology, Inc.

No. 6, Technology Rd. V, Science-Based Industrial Park, Hsinchu, Taiwan 30077, R.O.C

TEL: (886)-3-5782345 FAX: (886)-3-5778671

Etron Technology, Inc., reserves the right to make changes to its products and specifications without notice.

12 3 4 5 6 7...78

中文翻译

下载PDF

与EM637327相关器件

型号	品牌	获取价格	描述	数据表
EM637327Q-5	ETRON	获取价格	1Mega x 32 SGRAM
EM637327Q-6	ETRON	获取价格	1Mega x 32 SGRAM
EM637327Q-7	ETRON	获取价格	1Mega x 32 SGRAM
EM637327Q-8	ETRON	获取价格	1Mega x 32 SGRAM
EM637327TQ-5	ETRON	获取价格	1Mega x 32 SGRAM
EM637327TQ-6	ETRON	获取价格	1Mega x 32 SGRAM
EM637327TQ-7	ETRON	获取价格	1Mega x 32 SGRAM
EM637327TQ-8	ETRON	获取价格	1Mega x 32 SGRAM
EM638165	ETRON	获取价格	4Mega x 16 Synchronous DRAM (SDRAM)
EM638165BM-5H	ETRON	获取价格	4M x 16 bit Synchronous DRAM (SDRAM)

与EM637327相关文章

LM317T数据手册解读：产品特性、应用、封装与引脚详解
2024-06-14

12
一文带你了解?DB3二极管好坏判断、参数信息、替代推荐
2024-06-14

14
LM358DR数据手册：引脚说明、电气参数及替换型号推荐
2024-06-14

8
OP07CP数据手册解读：引脚信息、电子参数
2024-06-14

12

产品中心

服务支持

精选活动

关于我们

帮助中心

EM637327

EM637327 数据手册

与EM637327相关器件

与EM637327相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

EM637327

EM637327 数据手册

与EM637327相关器件

与EM637327相关文章

您还可以找

您在本页遇到什么问题？