Datasheet > EM42AM1684RTB-5F

EM42AM1684RTB-5F

更新时间： 2024-01-24 03:09:43

品牌	Logo	应用领域
EOREX		动态存储器双倍数据速率
页数	文件大小	规格书
19页	234K
描述
256Mb (4M×4Bank×16) Double DATA RATE SDRAM

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中文翻译

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技术参数
数据手册

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EM42AM1684RTB-5F 技术参数

生命周期：	Obsolete	包装说明：	,
Reach Compliance Code：	unknown	风险等级：	5.84
Base Number Matches：	1

EM42AM1684RTB-5F 数据手册

eorex

EM42AM1684RTB

256Mb (4M×4Bank×16)

Double DATA RATE SDRAM

Features

Description

• Internal Double-Date-Rate architecture with 2

Accesses per clock cycle.

• VDD=VDDQ= 2.5V ±0.2V (DDR-333)

• VDD=VDDQ= 2.6V ±0.1V (DDR-400)

• 2.5V SSTL-2 compatible I/O

• Burst Length (B/L) of 2, 4, 8

• 2,2.5,3 Clock read latency

• Bi-directional,intermittent data strobe(DQS)

• All inputs except data and DM are sampled

at the positive edge of the system clock.

• Data Mask (DM) for write data

The EM42AM1684RTB is high speed Synchronous

graphic RAM fabricated with ultra high performance

CMOS process containing 268,435,456 bits which

organized as 4Meg words x 4 banks by 16 bits.

The 256Mb DDR SDRAM uses a double data rate

architecture to accomplish high-speed operation.

The data path internally prefetches multiple bits and

It transfers the datafor both rising and falling edges

of the system clock.It means the doubled data

bandwidth can be achieved at the I/O pins.

Available packages:TSOPII 66P 400mil.

• Sequential & Interleaved Burst type available

• Auto Precharge option for each burst accesses

• DQS edge-aligned with data for Read cycles

• DQS center-aligned with data for Write cycles

• DLL aligns DQ & DQS transitions with CLK

transition

• Auto Refresh and Self Refresh

• 8,192 Refresh Cycles / 64ms

Ordering Information

Part No

Organization Max. clk Freq

Package

Grade

EM42AM1684RTB-5F

16M X 16

200MHz @CL3

66pin TSOP(ll) Commercial

Free

EM42AM1684RTB-6F

16M X 16

166MHz @CL25 66pin TSOP(ll) Commercial

Free

* EOREX reserves the right to change products or specification without notice.

Jun. 2009

www.eorex.com

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