BLOCK DIAGRAM—ÉLANSC410 MICROCONTROLLER
VL_BE3
VL_LDEV
VL_D/C
MWE
CASL/H1–CASL/H0
RAS1–RAS0
MA11–MA5
MA4
VL_LRDY
VL_M/IO
VL_W/R
DRAM Interface
and Feature
Configuration Pins
MA3 {CFG3}
MA2
VL_ADS
VESA Local Bus
VL_RST
MA1 {CFG1}
VL_BE2
VL_BE1
VL_BE0
VL_LCLK
MA0 {CFG0}
D15–D0
DRAM, VL, ROM,
and ISA Data
SD15–SD0 [D31–D16]
VL_BRDY
VL_BLAST
SA25–SA0
VL, ROM, and ISA
Address
DTR, RTS, SOUT
8-Pin Serial Port
ROMCS1–ROMCS0
ROMRD
CTS, DCD, DSR
ROM/Flash Control
RIN, SIN
ROMWR
SIROUT
SIRIN
IrDA Interface
IOR
IOW
Power
Management
Interface
ACIN
BL2–BL1
BL0 [CLK_IO]
ISA Bus Command
and Reset
MEMR
MEMW
RSTDRV
GPIO_CS0
GPIO_CS1
GPIOs
GPIO_CS2 [[DBUFRDL]]
GPIO/External
Buffer Control
BNDSCN_TCK
BNDSCN_TMS
GPIO_CS3 [[DBUFRDH]]
GPIO_CS4 [[DBUFOE]]
Boundary Scan
Interface
BNDSCN_TDI
BNDSCN_TDO
ÉlanSC410
Microcontroller
292 BGA
GPIO_CS5 [IOCS16]
GPIO_CS6 [IOCHRDY]
GPIO_CS7 [PIRQ1]
GPIO_CS8 [PIRQ0]
GPIO_CS9 [TC]
GPIO/ISA
Interface
GPIO31 [STRB]
GPIO_CS10 [AEN]
GPIO_CS11 [PDACK0]
GPIO_CS12 [PDRQ0]
GPIO30 [AFDT]
GPIO29 [SLCTIN]
GPIO28 [INIT]
GPIO_CS13
GPIO_CS14
GPIO15
Parallel Port or
GPIOs
GPIO27 [ERROR]
GPIO26 [PE]
GPIO/
GPIO16
Power Control
GPIO17
GPIO25 [ACK]
GPIO24 [BUSY]
GPIO23 [SLCT]
GPIO22 [PPOEN]
GPIO21 [PPDWE]
GPIO18
GPIO19 [LBL2]
GPIO20
KBD_COL7
Scan Keyboard
Columns/IRQs/XT
Keyboard Interface
KBD_COL6-2 / PIRQ7-3
KBD COL1-0 [XT_CLK/DAT]
SUS_RES / KBD_ROW14
KBD_ROW13 [R32BFOE]
KBD_ROW12 [MCS16]
32KXTAL1, 32KXTAL2
LF_INT, LF_LS
32 KHz Crystal
Loop Filters
KBD_ROW11 [SBHE]
KBD_ROW10 [BALE]
KBD_ROW9 [PIRQ2]
KBD_ROW8 [PDRQ1]
KBD_ROW7 [PDACK1]
LF_HS
Scan Keyboard
Rows/ISA Interface
RESET
Reset
VCC_RTC
BBATSEN
KBD_ROW6 [MA12]
KBD_ROW5 [RAS3]
RTC
Scan Keyboard
Rows/DRAM
Interface
KBD_ROW4 [RAS2]
KBD_ROW3 [CASH3]
KBD_ROW2 [CASH2]
KBD_ROW1 [CASL3]
KBD_ROW0 [CASL2]
SPKR
Speaker
Boundary Scan
Enable
BNDSCN_EN
Note: / =Two functions available on the pin at the same time. { } = Function during hardware reset. [ ] = Alternative function
selected by firmware configuration. [[ ]] = Alternate function selected by a hardware configuration pin state at power-on reset.