Datasheet > ELANSC310-25

ELANSC310-25

更新时间： 2024-11-17 03:34:07

品牌	Logo	应用领域
超微 - AMD		微控制器 PC
页数	文件大小	规格书
119页	1129K
描述
Single-Chip, 32-Bit, PC/AT Microcontroller

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ELANSC310-25 数据手册

PRELIMINARY

Élan^™SC310

Single-Chip, 32-Bit, PC/AT Microcontroller

n Integrated memory controller

DISTINCTIVE CHARACTERISTICS

– Controls symmetrically addressable DRAM or

asymmetrical 512 Kbyte x 8 bit or 1 Mbyte x 16 bit

DRAM or SRAM as main memory

n Highly integrated, single-chip CPU and system

logic

– Optimized for embedded PC applications

– Zero wait-state access with 70 ns, Page mode

DRAMs

– Combines 32 bit, x86 compatible, low-voltage

CPU with memory controller, PC/AT peripheral

controllers, real-time clock, and PLL clock

generators

– Supports up to 16 Mbyte system memory

– Supports up to 16 Mbyte of application ROM/

Flash, and 320 Kbyte direct ROM BIOS access.

Also supports shadow RAM

– 0.7 micron, low-voltage, CMOS process, fully

static

– Fully PC/AT compatible

n Enhanced Am386 SXLV CPU core

n Integrated PC/AT-lompatible leripheral logic

– 25 MHz or 33 MHz operating frequencies

– 3.3 V core, 3.3 V or 5 V memory and I/O

– Low-power, fully static design for long battery life

– One programmable interval timer (fully 8254

compatible)

– Two programmable interrupt controllers (8259A

compatible)

– System Management Mode (SMM) for power

management control

– Two DMA controllers (8237A compatible)

Integrated power management functions

– Built-in real-time clock (146818A compatible),

with an additional 114 bytes of RAM

– Internal clock generators (using multiple Phase-

Locked Loops and one external 32-KHz crystal)

– Internal Phase-Locked Loops (PLL) generate all

clocks from single 32.768 kHz crystal input

– Supports CPU System Management Mode

(SMM)

n Bus configurations

– Multiple operating modes: High Speed PLL, Low

Speed PLL, Doze, Sleep, Suspend, and Off. Fully

static design allows stopped clock.

– 16-bit data path

– Optional bus configurations:

— 386 Local Bus mode with subset ISA

— Maximum ISA Bus mode

– Four programmable chip selects

– Built-in 8042 chip select

– Comprehensive control of system and peripheral

clocks

– Five external power management control pins

– Suspend refresh of DRAM array

– Clock switching during ISA cycles

n Serial port controller (16450 UART compatible)

n Bidirectional parallel port (EPP compliant)

– Low power consumption: 0.12 mW typical

Suspend mode power

– Simultaneous multiple-voltage I/O pads operate

at either 3.3 V or 5 V. Core operates at 3.3 V for

minimum power consumption.

Publication# 20668 Rev: B Amendment/0

Issue Date: October 1997

This document contains information on a product under development at Advanced Micro Devices. The information

is intended to help you evaluate this product. AMD reserves the right to change or discontinue work on this product

without notice.

12 3 4 5 6 7...119

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与ELANSC310-25相关器件

型号	品牌	获取价格	描述	数据表
ELANSC310-25KC	AMD	获取价格	Single-Chip, 32-Bit, PC/AT Microcontroller
ELANSC310-25KI	AMD	获取价格	Single-Chip, 32-Bit, PC/AT Microcontroller
ELANSC310-25VC	AMD	获取价格	Single-Chip, 32-Bit, PC/AT Microcontroller
ELANSC310-33	AMD	获取价格	Single-Chip, 32-Bit, PC/AT Microcontroller
ELANSC310-33KC	AMD	获取价格	Single-Chip, 32-Bit, PC/AT Microcontroller
ELANSC310-33KI	AMD	获取价格	Single-Chip, 32-Bit, PC/AT Microcontroller
ELANSC310-33VC	AMD	获取价格	Single-Chip, 32-Bit, PC/AT Microcontroller
ELANSC400	AMD	获取价格	Single-Chip, Low-Power, PC/AT-Compatible Microcontrollers
ELANSC400-100AC	AMD	获取价格	Single-Chip, Low-Power, PC/AT-Compatible Microcontrollers
ELANSC400-100AI	AMD	获取价格	Single-Chip, Low-Power, PC/AT-Compatible Microcontrollers

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