Datasheet > EL4584CSZ-T13

EL4584CSZ-T13

更新时间： 2024-11-08 20:20:15

品牌	Logo	应用领域
瑞萨 - RENESAS		时钟光电二极管外围集成电路晶体
页数	文件大小	规格书
12页	236K
描述
36MHz, VIDEO CLOCK GENERATOR, PDSO16, 0.150 INCH, SOP-16

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EL4584CSZ-T13 技术参数

是否无铅：	不含铅	是否Rohs认证：	符合
生命周期：	Obsolete	零件包装代码：	SOIC
包装说明：	SOP, SOP16,.25	针数：	16
Reach Compliance Code：	compliant	ECCN代码：	EAR99
HTS代码：	8542.39.00.01	风险等级：	5.77
JESD-30 代码：	R-PDSO-G16	JESD-609代码：	e3
长度：	9.9 mm	湿度敏感等级：	3
端子数量：	16	最高工作温度：	85 °C
最低工作温度：	-40 °C	最大输出时钟频率：	36 MHz
封装主体材料：	PLASTIC/EPOXY	封装代码：	SOP
封装等效代码：	SOP16,.25	封装形状：	RECTANGULAR
封装形式：	SMALL OUTLINE	峰值回流温度（摄氏度）：	260
电源：	5 V	主时钟/晶体标称频率：	36 MHz
认证状态：	Not Qualified	座面最大高度：	1.75 mm
子类别：	Other Microprocessor ICs	标称供电电压：	5 V
表面贴装：	YES	技术：	CMOS
温度等级：	INDUSTRIAL	端子面层：	Matte Tin (Sn) - annealed
端子形式：	GULL WING	端子节距：	1.27 mm
端子位置：	DUAL	处于峰值回流温度下的最长时间：	40
宽度：	3.9 mm	uPs/uCs/外围集成电路类型：	CLOCK GENERATOR, VIDEO
Base Number Matches：	1

EL4584CSZ-T13 数据手册

EL4584

Data Sheet

July 25, 2005

FN7174.2

Horizontal Genlock, 4F

Features

• 36MHz, general purpose PLL

The EL4584 is a PLL (Phase Lock Loop) sub system,

designed for video applications but also suitable for general

purpose use up to 36MHz. In video applications, this device

generates a TTL/CMOS compatible Pixel Clock (CLK OUT)

which is a multiple of the TV horizontal scan rate and phase

locked to it.

• 4F based timing (use the EL4585 for 8F

)

• Compatible with EL4583 sync separator

• VCXO, Xtal, or LC tank oscillator

• < 2ns jitter (VCXO)

The reference signal is a horizontal sync signal, TTL/CMOS

format, which can be easily derived from an analog

composite video signal with the EL4583 Sync Separator. An

input signal to “coast” is provided for applications were

periodic disturbances are present in the reference video

timing such as VTR head switching. The Lock detector

output indicates correct lock.

• User controlled PLL capture and lock

• Compatible with NTSC and PAL TV formats

• 8 pre-programmed TV scan rate clock divisors

• Selectable external divide for custom ratios

• Single 5V, low current operation

The divider ratio is four ratios for NTSC and four similar

ratios for the PAL video timing standards, by external

selection of three control pins. These four ratios have been

• Pb-Free plus anneal available (RoHS compliant)

Applications

• Pixel clock regeneration

selected for common video applications including 4F

3F , 13.5MHz (CCIR 601 format) and square picture

elements used in some workstation graphics. To generate

• Video compression engine (MPEG) clock generator

• Video capture or digitization

8F , 6F , 27MHz (CCIR 601 format) etc. use the

EL4585, which includes an additional divide-by-two stage.

• PIP (Picture in Picture) timing generator

• Text or graphics overlay timing

For applications where these frequencies are inappropriate

or for general purpose PLL applications the internal divider

can be bypassed and an external divider chain used.

Ordering Information

FREQUENCIES AND DIVISORS

TAPE &

REEL

PKG. DWG.

CCIR 601 SQUARE

(NOTE 1) (NOTE 2) (NOTE 3)

PART NUMBER

EL4584CN

PACKAGE

16-Pin PDIP

FUNCTION

Divisor

PAL F

MDP0031

MDP0027

851

13.301

682

864

13.5

858

944

14.75

780

1135

17.734

910

EL4584CS

16-Pin SO (0.150”)

(MHz)

OSC

EL4584CS-T7

7”

13”

Divisor

NTSC F

NOTES:

EL4584CS-T13 16-Pin SO (0.150”)

MHz) 10.738

13.5

12.273

14.318

OSC

EL4584CSZ

(See Note)

16-Pin SO (0.150”)

(Pb-free)

1. 3F

numbers do not yield integer divisors.

EL4584CSZ-T7 16-Pin SO (0.150”)

(See Note) (Pb-free)

7”

MDP0027

2. CCIR 601 Divisors yield 720 pixels in the portion of each line for

NTSC and PAL.

3. Square pixels format gives 640 pixels for NTSC and 768 pixels

for PAL in the active portion.

EL4584CSZ-T13 16-Pin SO (0.150”)

(See Note) (Pb-free)

13”

*For 6F

and 8F

clock frequencies, see EL4585 datasheet.

NOTE: Intersil Pb-free plus anneal products employ special Pb-free material

sets; molding compounds/die attach materials and 100% matte tin plate

termination finish, which are RoHS compliant and compatible with both SnPb

and Pb-free soldering operations. Intersil Pb-free products are MSL classified

at Pb-free peak reflow temperatures that meet or exceed the Pb-free

requirements of IPC/JEDEC J STD-020.

Demo Board

A demo PCB is available for this product.

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.

All other trademarks mentioned are the property of their respective owners.

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与EL4584CSZ-T13相关器件

型号	品牌	获取价格	描述	数据表
EL4584CSZ-T7	INTERSIL	获取价格	Horizontal Genlock, 4FSC
EL4585	INTERSIL	获取价格	Horizontal Genlock, 8FSC
EL4585	ELANTEC	获取价格	Horizontal Genlock, 8 FSC
EL4585C	ELANTEC	获取价格	Horizontal Genlock, 8 FSC
EL4585CN	ELANTEC	获取价格	Horizontal Genlock, 8 FSC
EL4585CN	INTERSIL	获取价格	Horizontal Genlock, 8FSC
EL4585CS	ELANTEC	获取价格	Horizontal Genlock, 8 FSC
EL4585CS	INTERSIL	获取价格	Horizontal Genlock, 8FSC
EL4585CS-T13	INTERSIL	获取价格	Horizontal Genlock, 8FSC
EL4585CS-T13	ELANTEC	获取价格	Video Clock Generator, 36MHz, CMOS, PDSO16, SO-16

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