EL4583
®
Data Sheet
J une 27, 2005
FN7173.1
Sync Separator, 50% Slice, S-H, Filter,
Features
H
OUT
• NTSC, PAL, and SECAM sync separation
• Single supply, +5V operation
• Precision 50% slicing
The EL4583 extracts timing from video sync in NTSC, PAL,
and SECAM systems, and non standard formats, or from
computer graphics operating at higher scan rates. Timing
adjustment is via an external resistor. Input without valid
vertical interval (no serration pulses) produces a default
vertical output.
• Built-in programmable color burst filter
• Decodes non-standard vertical
• Horizontal sync output
Outputs are: composite sync, vertical sync, filter, burst/back
porch, horizontal, no signal detect, level, and odd/even
output (in interlaced scan formats only).
• Sync. pulse amplitude output
• Same socket can be used for 8-pin EL4581
• Low-power CMOS
The EL4583 sync slice level is set to the mid-point between
sync tip and the blanking level. This 50% point is determined
by two internal sample and hold circuits that track sync tip
and back porch levels. It provides hum and noise rejection
• Detects loss of signal
• Resistor programmable scan rate
• Few external components
and compensates for input levels of 0.5V to 2.0V
.
P-P
• Available in 16-pin PDIP and 16-pin SO (0.150”) packages
• Pb-Free Plus Anneal Available (RoHS Compliant)
A built in filter attenuates the chroma signal to prevent color
burst from disturbing the 50% sync slice. Cut off frequency is
set by a resistor to ground from the Filter Cut Off pin.
Additionally, the filter can be by-passed and video signal fed
directly to the Video Input.
Applications
• Video special effects
• Video test equipment
• Video distribution
• Multimedia
The level output pin provides a signal with twice the sync
amplitude which may be used to control an external AGC
function. A TTL/CMOS compatible No Signal Detect Output
flags a loss or reduction in input signal level. A resistor sets
the Set Detect Level.
• Displays
• Imaging
The EL4583 is manufactured using Elantec’s high
performance analog CMOS process.
• Video data capture
• Video triggers
Pinout
Ordering Information
EL4583
(16-PIN SO, PDIP)
TOP VIEW
TAPE & PKG.
REEL DWG. #
PART NUMBER
EL4583CN
PACKAGE
16-Pin PDIP
-
-
MDP0031
MDP0027
MDP0027
MDP0027
MDP0027
MDP0027
FILTER CUT OFF
SET DETECT LEVEL
COMPOSITE SYNC OUT
FILTER INPUT
1
2
3
4
5
6
7
8
16 ANALOG GND
EL4583CS
16-Pin SO (0.150”)
16-Pin SO (0.150”)
16-Pin SO (0.150”)
15 HORIZONTAL SYNC OUT
14 VDD
EL4583CS-T7
EL4583CS-T13
7”
13”
-
EL4583CSZ (Note) 16-Pin SO (0.150”) (Pb-free)
13 ODD/EVEN OUTPUT
12 RSET*
EL4583CSZ-T7
(Note)
16-Pin SO (0.150”) (Pb-free)
7”
VERTICAL SYNC OUT
DIGITAL GND
EL4583CSZ-T13 16-Pin SO (0.150”) (Pb-free)
(Note)
13”
MDP0027
11 BURST/BACK PORCH OUTPUT
10 NO SIGNAL DETECT OUTPUT
FILTER OUTPUT
NOTE: Intersil Pb-free plus anneal products employ special Pb-free
material sets; molding compounds/die attach materials and 100%
matte tin plate termination finish, which are RoHS compliant and
compatible with both SnPb and Pb-free soldering operations. Intersil
Pb-free products are MSL classified at Pb-free peak reflow
temperatures that meet or exceed the Pb-free requirements of
IPC/JEDEC J STD-020.
COMPOSITE VIDEO INPUT
9 LEVEL OUTPUT
*Note: R
must be a 1% register
SET
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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1
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