5秒后页面跳转
EDE5116ABSE PDF预览

EDE5116ABSE

更新时间: 2024-11-07 22:34:19
品牌 Logo 应用领域
尔必达 - ELPIDA 动态存储器双倍数据速率
页数 文件大小 规格书
66页 671K
描述
512M bits DDR2 SDRAM

EDE5116ABSE 数据手册

 浏览型号EDE5116ABSE的Datasheet PDF文件第2页浏览型号EDE5116ABSE的Datasheet PDF文件第3页浏览型号EDE5116ABSE的Datasheet PDF文件第4页浏览型号EDE5116ABSE的Datasheet PDF文件第5页浏览型号EDE5116ABSE的Datasheet PDF文件第6页浏览型号EDE5116ABSE的Datasheet PDF文件第7页 
DATA SHEET  
512M bits DDR2 SDRAM  
EDE5104ABSE (128M words × 4 bits)  
EDE5108ABSE (64M words × 8 bits)  
EDE5116ABSE (32M words × 16 bits)  
Features  
Description  
The EDE5104ABSE is a 512M bits DDR2 SDRAM  
Power supply: VDD, VDDQ = 1.8V ± 0.1V  
organized as 33,554,432 words × 4 bits × 4 banks.  
Double-data-rate architecture: two data transfers per  
clock cycle  
The EDE5108ABSE is a 512M bits DDR2 SDRAM  
organized as 16,777,216 words × 8 bits × 4 banks.  
Bi-directional, differential data strobe (DQS and  
/DQS) is transmitted/received with data, to be used in  
capturing data at the receiver  
They are packaged in 64-ball FBGA (µBGA) package.  
The EDE5116ABSE is a 512M bits DDR2 SDRAM  
organized as 8,388,608 words × 16 bits × 4 banks.  
DQS is edge aligned with data for READs: center-  
aligned with data for WRITEs  
It is packaged in 84-ball FBGA (µBGA) package.  
Differential clock inputs (CK and /CK)  
DLL aligns DQ and DQS transitions with CK  
transitions  
Commands entered on each positive CK edge: data  
and data mask referenced to both edges of DQS  
Four internal banks for concurrent operation  
Data mask (DM) for write data  
Burst lengths: 4, 8  
/CAS Latency (CL): 3, 4, 5  
Auto precharge operation for each burst access  
Auto refresh and self refresh modes  
7.8µs average periodic refresh interval  
SSTL_18 compatible I/O  
Posted CAS by programmable additive latency for  
better command and data bus efficiency  
Off-Chip-Driver Impedance Adjustment and On-Die-  
Termination for better signal quality  
Programmable RDQS, /RDQS output for making × 8  
organization compatible to × 4 organization  
/DQS, (/RDQS) can be disabled for single-ended  
Data Strobe operation.  
FBGA (µBGA) package with lead free solder  
(Sn-Ag-Cu)  
RoHS compliant  
Document No. E0323E90 (Ver. 9.0)  
Date Published September 2005 (K) Japan  
Printed in Japan  
URL: http://www.elpida.com  
Elpida Memory, Inc. 2002-2005  

与EDE5116ABSE相关器件

型号 品牌 获取价格 描述 数据表
EDE5116ABSE-4A-E ELPIDA

获取价格

512M bits DDR2 SDRAM
EDE5116ABSE-4C-E ELPIDA

获取价格

DDR DRAM, 32MX16, 0.6ns, CMOS, PBGA84, FBGA-84
EDE5116ABSE-5A-E ELPIDA

获取价格

暂无描述
EDE5116ABSE-5C-E ELPIDA

获取价格

512M bits DDR2 SDRAM
EDE5116AFSE ELPIDA

获取价格

512M bits DDR2 SDRAM (32M words x 16 bits)
EDE5116AFSE-4A-E ELPIDA

获取价格

512M bits DDR2 SDRAM (32M words x 16 bits)
EDE5116AFSE-5C-E ELPIDA

获取价格

512M bits DDR2 SDRAM (32M words x 16 bits)
EDE5116AFSE-6E-E ELPIDA

获取价格

512M bits DDR2 SDRAM (32M words x 16 bits)
EDE5116AHBG-4A-E ELPIDA

获取价格

512M bits DDR2 SDRAM
EDE5116AHBG-5C-E ELPIDA

获取价格

512M bits DDR2 SDRAM