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EDD5108AGTA-LI PDF预览

EDD5108AGTA-LI

更新时间: 2024-11-07 06:55:55
品牌 Logo 应用领域
尔必达 - ELPIDA 动态存储器双倍数据速率
页数 文件大小 规格书
52页 498K
描述
512M bits DDR SDRAM WTR (Wide Temperature Range)

EDD5108AGTA-LI 数据手册

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PRELIMINARY DATA SHEET  
512M bits DDR SDRAM  
WTR (Wide Temperature Range)  
EDD5108AGTA-LI (64M words × 8 bits)  
EDD5116AGTA-LI (32M words × 16 bits)  
Features  
Specifications  
Density: 512M bits  
Organization  
Double-data-rate architecture; two data transfers per  
clock cycle  
The high-speed data transfer is realized by the 2 bits  
prefetch pipelined architecture  
16M words × 8 bits × 4 banks (EDD5108AGTA)  
8M words × 16 bits × 4 banks (EDD5116AGTA)  
Package: 66-pin plastic TSOP (II)  
Lead-free (RoHS compliant)  
Power supply: VDD, VDDQ = 2.5V 0.2V  
Data rate: 400Mbps/333Mbps/266Mbps (max.)  
Four internal banks for concurrent operation  
Interface: SSTL_2  
Bi-directional data strobe (DQS) is transmitted  
/received with data for capturing data at the receiver  
Data inputs, outputs, and DM are synchronized with  
DQS  
DQS is edge-aligned with data for READs; center-  
aligned with data for WRITEs  
Differential clock inputs (CK and /CK)  
DLL aligns DQ and DQS transitions with CK  
Burst lengths (BL): 2, 4, 8  
Burst type (BT):  
Sequential (2, 4, 8)  
Interleave (2, 4, 8)  
/CAS Latency (CL): 2, 2.5, 3  
Precharge: auto precharge option for each burst  
access  
transitions  
Commands entered on each positive CK edge; data  
and data mask referenced to both edges of DQS  
Data mask (DM) for write data  
·Wide temperature range  
TA = –40°C to +85°C  
Driver strength: normal/weak  
Refresh: auto-refresh, self-refresh  
Refresh cycles: 8192 cycles/64ms  
Average refresh period: 7.8μs  
Operating ambient temperature range  
TA = –40°C to +85°C  
Document No. E1304E10 (Ver. 1.0)  
Date Published April 2008 (K) Japan  
Printed in Japan  
URL: http://www.elpida.com  
©Elpida Memory, Inc. 2008  

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