Datasheet > EDD1204ALTA

EDD1204ALTA

更新时间： 2024-02-12 06:52:28

品牌	Logo	应用领域
尔必达 - ELPIDA		动态存储器双倍数据速率
页数	文件大小	规格书
78页	1650K
描述
128 M-bit Synchronous DRAM with Double Data Rate (4-bank, SSTL_2)

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EDD1204ALTA 数据手册

PRELIMINARY DATA SHEET

MOS INTEGRATED CIRCUIT

EDD1204ALTA, EDD1208ALTA, EDD1216ALTA

128 M-bit Synchronous DRAM with Double Data Rate

(4-bank, SSTL_2)

Description

The EDD1204ALTA, EDD1208ALTA, EDD1216ALTA are high-speed 134,217,728 bits synchronous dynamic

random-access memories, organized as 8,388,608x4x4, 4,194,304x8x4, 2,097,152x16x4 (word x bit x bank),

respectively.

The synchronous DRAMs use Double Data Rate (DDR) where data bandwidth is twice of regular synchronous

DRAM.

The synchronous DRAM is compatible with SSTL_2 (Stub Series terminated Logic for 2.5 V).

The synchronous DRAM is packaged in 66-pin Plastic TSOP (II).

Features

• Fully Synchronous Dynamic RAM with all input signals except DM, DQS and DQ referenced to a positive clock edge

• Double Data Rate interface

Differential CLK (/CLK) input

Data inputs and DM are synchronized with both edges of DQS

Data outputs and DQS are synchronized with a cross point of CLK and /CLK

• Quad internal banks operation

• Possible to assert random column address in every clock cycle

• Programmable Mode register set

/CAS latency (2, 2.5)

Burst length (2, 4, 8)

Wrap sequence (Sequential / Interleave)

• Automatic precharge and controlled precharge

• CBR (Auto) refresh and self refresh

• x4, x8, x16 organization

• Byte write control (x4, x8) by DM

• Byte write control (x16) by LDM and UDM

• 2.5 V ± 0.2 V Power supply for V^DD

• 2.5 V ± 0.2 V Power supply for V^DDQ

• Maximum clock frequency up to 133 MHz

• SSTL_2 compatible with all signals

• 4,096 refresh cycles/64 ms

• 66-pin Plastic TSOP (II) (10.16 mm (400))

• Burst termination by Precharge command and Burst stop command

The information in this document is subject to change without notice. Before using this document, please

confirm that this is the latest version.

Not all devices/types available in every country. Please check with local Elpida Memory, Inc. for

availability and additional information.

Document No. E0136E30 (Ver. 3.0)

Date Published October 2001 (K)

Printed in Japan

Elpida Memory, Inc. is a joint venture DRAM company of NEC Corporation and Hitachi, Ltd.

12 3 4 5 6 7...78

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与EDD1204ALTA相关器件

型号	品牌	获取价格	描述	数据表
EDD1204ALTA-1A	ELPIDA	获取价格	128 M-bit Synchronous DRAM with Double Data Rate (4-bank, SSTL_2)
EDD1204ALTA-75	ELPIDA	获取价格	128 M-bit Synchronous DRAM with Double Data Rate (4-bank, SSTL_2)
EDD1204ALTA-7A	ELPIDA	获取价格	128 M-bit Synchronous DRAM with Double Data Rate (4-bank, SSTL_2)
EDD1208ALTA	ELPIDA	获取价格	128 M-bit Synchronous DRAM with Double Data Rate (4-bank, SSTL_2)
EDD1208ALTA-1A	ELPIDA	获取价格	128 M-bit Synchronous DRAM with Double Data Rate (4-bank, SSTL_2)
EDD1208ALTA-75	ELPIDA	获取价格	128 M-bit Synchronous DRAM with Double Data Rate (4-bank, SSTL_2)
EDD1208ALTA-7A	ELPIDA	获取价格	128 M-bit Synchronous DRAM with Double Data Rate (4-bank, SSTL_2)
EDD1216AASE	ELPIDA	获取价格	128M bits DDR SDRAM (8M words x 16 bits)
EDD1216AASE-6B-E	ELPIDA	获取价格	128M bits DDR SDRAM (8M words x 16 bits)
EDD1216AASE-7A-E	ELPIDA	获取价格	128M bits DDR SDRAM (8M words x 16 bits)

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