DATA SHEET
2GB Fully Buffered DIMM
EBE21FE8ACFR
Specifications
Features
• Density: 2GB
• JEDEC standard Raw Card B Design
• Organization
• Industry Standard Advanced Memory Buffer (AMB)
256M words × 72 bits, 2 ranks
• High-speed differential point-to-point link interface at
1.5V (JEDEC spec)
• Mounting 18 pieces of 1G bits DDR2 SDRAM sealed
in FBGA
14 north-bound (NB) high speed serial lanes
10 south-bound (SB) high speed serial lanes
• Various features/modes:
• Package
240-pin fully buffered, socket type dual in line
memory module (FB-DIMM)
MemBIST and IBIST test functions
PCB height: 30.35mm
Transparent mode and direct access mode for
DRAM testing
Lead pitch: 1.00mm
Advanced Memory Buffer (AMB): 655-ball FCBGA
Lead-free (RoHS compliant)
• Power supply
Interface for a thermal sensor and status indicator
• Channel error detection and reporting
• Automatic DDR2 SDRAM bus and channel
calibration
DDR2 SDRAM: VDD = 1.8V ± 0.1V
AMB: VCC = 1.5V + 0.075V/ −0.045V
• Data rate: 667Mbps (max.)
• SPD (serial presence detect) with 1piece of 256 byte
serial EEPROM
• Eight internal banks for concurrent operation
(components)
Note: Warranty void if removed DIMM heat
spreader.
• Interface: SSTL_18
• Burst lengths (BL): 4, 8
• /CAS Latency (CL): 3, 4, 5
• Precharge: auto precharge option for each burst
access
• Refresh: auto-refresh, self-refresh
• Refresh cycles: 8192 cycles/64ms
Average refresh period
7.8µs at 0°C ≤ TC ≤ +85°C
3.9µs at +85°C < TC ≤ +95°C
• Operating case temperature range
TC = 0°C to +95°C
Performance
FB-DIMM
DDR2 SDRAM
System clock
frequency
Peak channel
throughput
Speed grade
PC2-5300F
FB-DIMM link data rate
4.0Gbps
Speed Grade
DDR data rate
667Mbps
167MHz
8.0GByte/s
DDR2-667 (5-5-5)
Document No. E1345E20 (Ver. 2.0)
Date Published October 2008 (K) Japan
Printed in Japan
URL: http://www.elpida.com
Elpida Memory, Inc. 2008