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E13D8D2F-187.500M TR PDF预览

E13D8D2F-187.500M TR

更新时间： 2024-11-26 20:58:39
品牌 Logo 应用领域
日蚀 - ECLIPTEK /
页数 文件大小 规格书
5页 182K
描述
OSCILLATORS 50PPM 0+70 3.3V 4 187.500MHZ TS LVPECL 5X7 6-PAD SMD

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E13D8D2F-187.500M TR 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：ActiveReach Compliance Code：unknown
风险等级：5.71Base Number Matches：1

E13D8D2F-187.500M TR 数据手册

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RoHS  
Pb  
E13D8D2F-187.500M  
E13D8 D 2 F -187.500M  
Series  
Nominal Frequency  
RoHS Compliant (Pb-free) 6 Pad 5mm x 7mm Ceramic  
SMD 3.3 LVPECL Oscillator  
187.500MHz  
Logic Control / Additional Output  
Tri-State (High Impedance) and Complementary Output  
Frequency Tolerance/Stability  
±50ppm Maximum over 0°C to +70°C  
Duty Cycle  
50 ±5(%)  
ELECTRICAL SPECIFICATIONS  
Nominal Frequency  
187.500MHz  
Frequency Tolerance/Stability  
±50ppm Maximum over 0°C to +70°C (Inclusive of all conditions: Calibration Tolerance at 25°C, Frequency  
Stability over the Operating Temperature Range, Supply Voltage Change, Output Load Change, 1st Year  
Aging at 25°C, Shock, and Vibration)  
Supply Voltage  
3.3Vdc ±5%  
Input Current  
75mA Maximum (with Load)  
Output Voltage Logic High (Voh)  
Output Voltage Logic Low (Vol)  
Peak to Peak Output Voltage Swing  
Rise/Fall Time  
Vcc-1.4Vdc Minimum, Vcc-1.2Vdc Typical, Vcc-0.9Vdc Maximum  
Vcc-1.7Vdc Maximum, Vcc-1.85Vdc Typical, Vcc-2.0Vdc Minimum  
600mVdc Minimum, 800mVdc Typical, 1000mVdc Maximum  
300pSec Typical, 600pSec Maximum (Measured over 20% to 80% of waveform)  
50 ±5(%) (Measured at 50% of waveform)  
50 Ohms into Vcc-2.0Vdc  
Duty Cycle  
Load Drive Capability  
Output Logic Type  
LVPECL  
Phase Noise  
-60dBc/Hz at 10Hz Offset, -90dBc/Hz at 100Hz Offset, -115dBc/Hz at 1kHz Offset, -129dBc/Hz at 10kHz  
Offset, -130dBc/Hz at 100kHz Offset, -131dBc/Hz at 1MHz Offset, -148dBc/Hz at 10MHz Offset (All Values  
are Typical, Fo = 156.250MHz)  
Logic Control / Additional Output  
Tri-State Input Voltage (Vih and Vil)  
Tri-State (High Impedance) and Complementary Output  
Enable High Option: Vih of 70% of Vcc Minimum or No Connect to Enable Output and Complementary  
Output, Vil of 30% of Vcc Maximum to Disable Output and Complementary Output (High Impedance).  
Standby Current  
600µA Maximum (Disabled Output, High Impedance, without Load)  
0.7pSec Typical, 1pSec Maximum (FJ=12kHz to 20MHz)  
10mSec Maximum  
RMS Phase Jitter  
Start Up Time  
Storage Temperature Range  
-55°C to +125°C  
ENVIRONMENTAL & MECHANICAL SPECIFICATIONS  
Fine Leak Test  
MIL-STD-883, Method 1014, Condition A  
MIL-STD-883, Method 1014, Condition C  
MIL-STD-202, Method 213, Condition C  
MIL-STD-202, Method 210  
Gross Leak Test  
Mechanical Shock  
Resistance to Soldering Heat  
Resistance to Solvents  
Solderability  
MIL-STD-202, Method 215  
MIL-STD-883, Method 2003  
Temperature Cycling  
Vibration  
MIL-STD-883, Method 1010  
MIL-STD-883, Method 2007, Condition A  
www.ecliptek.com | Specification Subject to Change Without Notice | Rev B 2/13/2010 | Page 1 of 5  
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