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E-STE100PTR

更新时间: 2024-11-02 13:07:43
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 控制器PC以太网局域网(LAN)标准
页数 文件大小 规格书
82页 797K
描述
Ethernet Transceiver, CMOS, PQFP64

E-STE100PTR 技术参数

生命周期:Obsolete包装说明:LFQFP,
Reach Compliance Code:unknown风险等级:5.81
Is Samacsys:NJESD-30 代码:S-PQFP-G64
长度:10 mm功能数量:1
端子数量:64最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:LFQFP封装形状:SQUARE
封装形式:FLATPACK, LOW PROFILE, FINE PITCH座面最大高度:1.6 mm
标称供电电压:3.3 V表面贴装:YES
技术:CMOS电信集成电路类型:ETHERNET TRANSCEIVER
温度等级:INDUSTRIAL端子形式:GULL WING
端子节距:0.5 mm端子位置:QUAD
宽度:10 mmBase Number Matches:1

E-STE100PTR 数据手册

 浏览型号E-STE100PTR的Datasheet PDF文件第2页浏览型号E-STE100PTR的Datasheet PDF文件第3页浏览型号E-STE100PTR的Datasheet PDF文件第4页浏览型号E-STE100PTR的Datasheet PDF文件第5页浏览型号E-STE100PTR的Datasheet PDF文件第6页浏览型号E-STE100PTR的Datasheet PDF文件第7页 
STE10/100A  
PCI 10/100 Ethernet controller with integrated PHY (3.3V)  
Features  
IEEE802.3u 100BASE-TX and IEEE802.3  
10BASE-T compliant  
Support for IEEE802.3x flow control  
IEEE802.3u auto-negotiation support for  
PQFP128 (14mm x 20mm x 2.7mm)  
10BASE-T and 100BASE-TX  
PCI bus interface rev. 2.2 compliant  
Description  
ACPI and PCI power management standard  
compliant  
The STE10/100A is a high performing PCI fast  
ethernet controller with integrated physical layer  
interface for 10BASE-T and 100BASE-TX  
applications.  
Support for PC99 wake on LAN  
Provides 32-bit PCI bus master data transfer at  
PCI clocks of 20-33 MHz  
It was designed with advanced CMOS technology  
to provide glueless 32-bit bus master interface for  
PCI bus, boot ROM interface, CSMA/CD protocol  
for fast ethernet, as well as the physical media  
interface for 100BASE-TX of IEEE802.3u and  
10BASE-T of IEEE802.3. The auto-negotiation  
function is also supported for speed and duplex  
detection.  
Provides writable EEPROM/Boot rom interface  
Provides independent transmission and  
receiving FIFOs, each 2k bytes long  
Supports big endian or little endian byte  
ordering  
ACPI and PCI compliant power management  
functions offer significant power-savings  
performance  
The STE10/100A provides both half-duplex and  
full-duplex operation, as well as support for full-  
duplex flow control. It provides long FIFO buffers  
for transmission and receiving, and early interrupt  
mechanism to enhance performance. The  
STE10/100A also supports ACPI and PCI  
compliant power management function  
Provides general purpose timers  
128-pin QFP package  
February 2007  
Rev 8  
1/82  
www.st.com  
82  

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