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DTC311T3G PDF预览

DTC311T3G

更新时间: 2024-09-10 01:02:23
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描述
Bias Resistor Transistors

DTC311T3G 数据手册

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DTC301~311 / DTC317  
DTC322~323  
SEMICONDUCTOR  
TECHNICAL DATA  
Bias Resistor Transistors  
NPN Silicon Surface Mount Transistor  
with Monolithic Bias Resistor Network  
3
This new series of digital transistors is designed to replace a single  
device and its external resistor bias network. The BRT (Bias Resistor  
Transistor) contains a single transistor with a monolithic bias network  
consisting of two resistors; a series base resistor and a base-emitter  
resistor. The BRT eliminates these individual components by  
integrating them into a single device. The use of a BRT can reduce  
both system cost and board space. The device is housed in the SC-70 /  
SOT-323 package which is designed for low power surface mount  
applications.  
2
1
SC-70 / SOT-323  
PIN 3  
COLLECTOR  
(OUTPUT)  
R 1  
R2  
PIN 1  
BASE  
Simplifies Circuit Design  
Reduces Board Space  
(INPUT)  
PIN 2  
EMITTER  
(GROUND)  
Reduces Component Count  
DEVICE MARKING INFORMATION  
See specific marking information in the device marking table on  
page 2 of this data sheet.  
MAXIMUM RATINGS (TA = 25 C unless otherwise noted)  
Rating  
Collector-Base Voltage  
Collector-Emitter Voltage  
Collector Current  
Symbol  
VCBO  
VCEO  
IC  
Value  
50  
Unit  
Vdc  
50  
Vdc  
100  
mAdc  
THERMAL CHARACTERISTICS  
Characteristic  
Symbol  
PD  
Max  
Unit  
mW  
Total Device Dissipation  
TA = 25 C  
Derate above 25 C  
202 (Note 1.)  
310 (Note 2.)  
1.6 (Note 1.)  
2.5 (Note 2.)  
mW/ C  
C/W  
C/W  
C
Thermal Resistance –  
Junction-to-Ambient  
RθJA  
618 (Note 1.)  
403 (Note 2.)  
Thermal Resistance –  
Junction-to-Lead  
RθJL  
280 (Note 1.)  
332 (Note 2.)  
Junction and Storage  
Temperature Range  
TJ, Tstg  
–55 to +150  
1. FR–4 @ Minimum Pad  
2. FR–4 @ 1.0 x 1.0 inch Pad  
2008. 03. 10  
Revision No : 0  
1/10  

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