Datasheet > DTC103

DTC103

更新时间： 2024-11-27 00:57:15

品牌	Logo	应用领域
FS		/
页数	文件大小	规格书
16页	289K
描述
Bias Resistor Transistor

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中文翻译

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数据手册

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DTC103 数据手册

DTC 101 ~ 108

DTC 110 ~ 112 / 114 /117

DTC 123 / 124

SEMICONDUCTOR

TECHNICAL DATA

Bias Resistor Transistor

NPN Silicon Surface Mount Transistor

with Monolithic Bias Resistor Network

This new series of digital transistors is designed to replace a single

device and its external resistor bias network. The BRT (Bias Resistor

Transistor) contains a single transistor with a monolithic bias network

resistor. The BRT eliminates these individual components by

integrating them into a single device. The use of a BRT can reduce

both system cost and board space. The device is housed in the SOT-23

package which is designed for low power surface mount applications.

SOT–23 (TO–236AB)

PIN 3

• Simplifies Circuit Design

• Reduces Board Space and Component Count

• The SOT-23 package can be soldered using wave or reflow. The

modified gull-winged leads absorb thermal stress during soldering

eliminating the possibility of damage to the die.

COLLECTOR

(OUTPUT)

R₁

PIN 1

BASE

(INPUT)

R₂

PIN 2

EMITTER

(GROUND)

MAXIMUM RATINGS (T_A= 25 C unless otherwise noted)

Rating

Collector-Base Voltage

Collector-Emitter Voltage

Collector Current

Symbol

V_CBO

V_CEO

I_C

Value

Unit

Vdc

100

mAdc

Total Power Dissipation @ T_A= 25 C

(Note 1.) Derate above 25 C

P_D

246

1.5

C/W

DEVICE MARKING AND RESISTOR VALUES

Device

Marking

A8J

R1(K)

4.7

R2(K)

4.7

Shipping

3000/Tape & Reel

DTC101

DTC102

DTC103

DTC104

DTC105

DTC106

DTC107

DTC108

DTC110

DTC111

DTC112

DTC114

DTC117

DTC123

DTC124

A8A

A8B

A8C

A8M

A8K

A8D

A8L

A8F

A8E

A8U

A8T

A8H

A8G

A8R

∞

2.2

4.7

∞

100

∞

2.2

1.0

2.2

1.0

∞

1. Device mounted on a FR-4 glass epoxy printed circuit board using the

minimum recommended footprint.

2008. 8. 28

Revision No : 1

1/16

12 3 4 5 6 7...16

中文翻译

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