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DTA144W PDF预览

DTA144W

更新时间: 2024-09-11 22:50:51
品牌 Logo 应用领域
安森美 - ONSEMI 晶体晶体管
页数 文件大小 规格书
12页 160K
描述
Bias Resistor Transistor

DTA144W 数据手册

 浏览型号DTA144W的Datasheet PDF文件第2页浏览型号DTA144W的Datasheet PDF文件第3页浏览型号DTA144W的Datasheet PDF文件第4页浏览型号DTA144W的Datasheet PDF文件第5页浏览型号DTA144W的Datasheet PDF文件第6页浏览型号DTA144W的Datasheet PDF文件第7页 
MUN2111T1 Series  
Preferred Devices  
Bias Resistor Transistors  
PNP Silicon Surface Mount Transistors  
with Monolithic Bias Resistor Network  
This new series of digital transistors is designed to replace a single  
device and its external resistor bias network. The  
Bias Resistor Transistor (BRT) contains a single transistor with a  
monolithic bias network consisting of two resistors; a series base  
resistor and a baseemitter resistor. The BRT eliminates these  
individual components by integrating them into a single device. The  
use of a BRT can reduce both system cost and board space. The device  
is housed in the SC59 package which is designed for low power  
surface mount applications.  
Simplifies Circuit Design  
Reduces Board Space  
Reduces Component Count  
Moisture Sensitivity Level: 1  
ESD Rating Human Body Model: Class 1  
ESD Rating Machine Model: Class B  
http://onsemi.com  
PIN 3  
COLLECTOR  
(OUTPUT)  
R1  
R2  
PIN 2  
BASE  
(INPUT)  
PIN 1  
EMITTER  
(GROUND)  
3
The SC59 package can be soldered using wave or reflow.  
The modified gullwinged leads absorb thermal stress during  
soldering eliminating the possibility of damage to the die.  
PbFree Package is Available  
2
1
SC59  
CASE 318D  
PLASTIC  
MAXIMUM RATINGS (T = 25°C unless otherwise noted)  
A
MARKING DIAGRAM  
Rating  
CollectorBase Voltage  
CollectorEmitter Voltage  
Collector Current  
Symbol  
Value  
50  
Unit  
Vdc  
V
V
CBO  
CEO  
50  
Vdc  
6x M  
I
100  
mAdc  
C
THERMAL CHARACTERISTICS  
Characteristic  
Symbol  
Max  
Unit  
6x = Specific Device Code*  
M = Date Code  
Total Device Dissipation  
P
230 (Note 1)  
338 (Note 2)  
1.8 (Note 1)  
2.7 (Note 2)  
mW  
D
T = 25°C  
A
Derate above 25°C  
°C/W  
°C/W  
°C/W  
°C  
ORDERING INFORMATION  
See detailed ordering and shipping information on page 2 of  
this data sheet.  
Thermal Resistance −  
JunctiontoAmbient  
R
q
JA  
540 (Note 1)  
370 (Note 2)  
DEVICE MARKING INFORMATION  
*See device marking table on page 2 of this data sheet.  
Thermal Resistance −  
JunctiontoLead  
R
q
JL  
264 (Note 1)  
287 (Note 2)  
Junction and Storage  
Temperature Range  
T , T  
55 to +150  
J
stg  
Preferred devices are recommended choices for future use  
and best overall value.  
Maximum ratings are those values beyond which device damage can occur.  
Maximum ratings applied to the device are individual stress limit values (not  
normal operating conditions) and are not valid simultaneously. If these limits are  
exceeded, device functional operation is not implied, damage may occur and  
reliability may be affected.  
1. FR4 @ Minimum Pad.  
2. FR4 @ 1.0 x 1.0 inch Pad.  
Semiconductor Components Industries, LLC, 2005  
Publication Order Number:  
1
January, 2005 Rev. 14  
MUN2111T1/D  
 

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