Datasheet > DSP96002

DSP96002

更新时间： 2024-11-04 22:40:39

品牌	Logo	应用领域
摩托罗拉 - MOTOROLA		/
页数	文件大小	规格书
111页	714K
描述
32-BIT GENERAL PURPOSE FLOATING-POINT DUAL-PORT PROCESSOR

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数据手册

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DSP96002 数据手册

Freescale Semiconductor, Inc.

MOTOROLA

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DSP96002/D, Rev. 2

SEMICONDUCTOR TECHNICAL DATA

DSP96002

32-BIT GENERAL PURPOSE FLOATING-POINT DUAL-PORT

PROCESSOR

The DSP96002 is designed to support intensive graphic image and numeric processing. It is

a dual-port, low-power, general purpose floating-point processor. The DSP includes 1024

words of data RAM (equally divided into X data and Y data memory), 1024 words of full-

speed on-chip Program RAM, two data ROMs, a dual-channel Direct Memory Access (DMA)

controller, special on-chip bootstrap hardware, and On-Chip Emulation (OnCE™) debug

circuitry. The Central Processing Unit (CPU) consists of three 32-bit execution units

operating in parallel. The DSP96002 has two identical memory expansion ports with control

lines to facilitate interfacing SRAMs, DRAMs (operating in their fast access modes), and

Video RAMs (VRAMs). Each port can be configured as a Host Interface (HI), which

facilitates easy interface with other processors for multiprocessor applications. Linear arrays

of DSP96002s can be implemented without glue logic. The MPU-style programming model

and instruction set allow straightforward generation of efficient, compact code. The high

speed of the DSP96002 makes it well-suited for high bandwidth and numerically intensive

applications that require floating-point processing and access to large memory subsystems.

Control

Address

Generation

Unit (AGU)

Bus

Control

Bus

Control

Address

YAB

XAB

PAB

Address

External

Address

Switch

External

Address

Switch

Program

X Data

Memory

512 × 32

Y Data

Memory

512 × 32

RAM

Dual Channel

DMA

Controller

Memory

1024 × 32

RAM and

64 × 32

Bootstrap

ROM

Instruction

Cache

RAM

32-bit

Host

Interface

32-bit

Host

Interface

Internal

Switch And Bit

Manipulation

Unit

512 × 32† 512 × 32†

ROM

Timer

DDB

YDB

XDB

PDB

GDB

External

Data

Bus

External

Data

Bus

Data

Switch

OnCE

Debug

Controller

Clock

Generator

Program

Decode

Controller

Program

Address

Generator

Program

Interrupt

Controller

Data ALU

• IEEE Floating Point

• 32 × 32 Integer ALU

Program Controller

MODC/IRQC

MODB/IRQB

MODA/IRQA

CLK

32-bit Buses

Dual Access (DMA/Core)

1024 × 32 Virtual Locations

Serial Debug

Port

RESET

†

AA0306

Figure 1 Block Diagram

For More Information On This Product,

Go to: www.freescale.com

12 3 4 5 6 7...111

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与DSP96002相关器件

型号	品牌	获取价格	描述	数据表
DSP96002FE40	MOTOROLA	获取价格	32-BIT GENERAL PURPOSE FLOATING-POINT DUAL-PORT PROCESSOR
DSP96002FE60	MOTOROLA	获取价格	32-BIT GENERAL PURPOSE FLOATING-POINT DUAL-PORT PROCESSOR
DSP96002RC27	ETC	获取价格	32-Bit Digital Signal Processor
DSP96002RC33	MOTOROLA	获取价格	32-BIT GENERAL PURPOSE FLOATING-POINT DUAL-PORT PROCESSOR
DSP96002RC40	MOTOROLA	获取价格	32-BIT GENERAL PURPOSE FLOATING-POINT DUAL-PORT PROCESSOR
DSP96002RC60	MOTOROLA	获取价格	32-BIT GENERAL PURPOSE FLOATING-POINT DUAL-PORT PROCESSOR
DSP96002UM	ETC	获取价格	DSP96002 32-Bit Floating-Point Dual-Port DSP
DSP-9C1	SYNERGY	获取价格	POWER DIVIDERS 0ì : 8-WAY
DSP-9D4	SYNERGY	获取价格	POWER DIVIDERS 0ì : 4-WAY
DSP-9E4	SYNERGY	获取价格	POWER DIVIDERS 0ì : 4-WAY

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