Datasheet > DSP56603DS

DSP56603DS

更新时间： 2024-01-19 05:32:41

品牌	Logo	应用领域
其他 - ETC		数字信号处理器
页数	文件大小	规格书
90页	732K
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DSP56603 16-Bit Digital Signal Processor Datasheet

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数据手册

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DSP56603DS 数据手册

Freescale Semiconductor, Inc.

MOTOROLA

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by: DSP56603/D

SEMICONDUCTOR TECHNICAL DATA

DSP56603

Advance Information

16-BIT DIGITAL SIGNAL PROCESSOR

The DSP56603 is designed specifically for low-power digital cellular subscriber applications

and can perform a wide variety of fixed-point digital signal processing algorithms. The

DSP56603 is a member of the DSP56600 core family of 16-bit programmable CMOS Digital

Signal Processors (DSPs). The DSP56600 core can execute one instruction per clock cycle.

This 60-MHz chip is optimized for processing-intensive, yet cost-effective, low power

consumption digital mobile communications applications. Because the DSP56603 provides

on-chip Program and data RAM, as well as the ability to switch sections of this memory

between program and data memory, it is also suitable for use as a development platform.

Figure 1 provides a block diagram of the DSP56603, showing the core structures and the

expansion areas. The DSP56600 core includes the Data Arithmetic and Logic Unit (ALU),

Address Generation Unit (AGU), Program Controller, Program Patch Detector, Bus Interface

Unit, On-Chip Emulation (OnCE™) module, JTAG port, and a Phase Lock Loop (PLL)-based

clock generator. The expansion areas provide the switchable program and data memories, as

well as a versatile set of on-chip peripherals and external ports.

Memory

Expansion

Area

Triple

Dedicated

GPIO

Host

SSI

Interface

or GPIO

pins

Bootstrap

ROM

3072 × 24

Timer or

Interface

HI08 or

GPIO

pins

X Memory

Y Memory

Program

RAM

16.5 K × 24

RAM

8192 × 16

Peripheral

Expansion Area

YAB

XAB

PAB

Address

Generation

Unit

Address

External

Bus

Interface

Program

Patch

16-bit

DSP56600

Core

Control

Detector

YDB

XDB

PDB

Data

Internal

Data

Bus

Switch

Power

Manage-

ment

Clock

Generator

Data ALU

Program

Decode

Controller

Program

Address

Generator

→

40-bit MAC

16 × 16 40

Interrupt

JTAG

Two 40-bit Accumulators

40-bit Barrel Shifter

Controller

PLL

OnCE™

MODA/IRQA

CLKOUT

MODB/IRQB

PINIT/NMI

MODC/IRQC

RESET

MODD/IRQD

AA0529

Figure 1 DSP56603 Block Diagram

This document contains information on a new product. Specifications and information herein are subject to change without notice.

For More Information On This Product,

Go to: www.freescale.com

12 3 4 5 6 7...90

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与DSP56603DS相关器件

型号	品牌	获取价格	描述	数据表
DSP56603P	FREESCALE	获取价格	16-BIT DIGITAL SIGNAL PROCESSOR
DSP56603PV60	MOTOROLA	获取价格	Digital Signal Processor, 16-Bit Size, 24-Ext Bit, 60MHz, CMOS, PQFP144
DSP56603UM	FREESCALE	获取价格	16-BIT DIGITAL SIGNAL PROCESSOR
DSP56651	FREESCALE	获取价格	INTERGRATED CELLULAR BASEBAND PROCESSOR DEVELOPMENT IC
DSP56651ADMUM	ETC	获取价格	DSP56651ADM User＇s Manual
DSP56651D	FREESCALE	获取价格	INTERGRATED CELLULAR BASEBAND PROCESSOR DEVELOPMENT IC
DSP56651DS	ETC	获取价格	DSP56651/D Integrated Cellular Baseband Processor Development IC Revision 0
DSP56652	MOTOROLA	获取价格	Mixed Signal Processor, 16-Ext Bit, 58.8MHz, CMOS, PBGA196, 15 X 15 MM, PLASTIC, BGA-196
DSP56652DS	ETC	获取价格	DSP56652/D Integrated Cellular Baseband Processor
DSP56652UM	FREESCALE	获取价格	INTERGRATED CELLULAR BASEBAND PROCESSOR DEVELOPMENT IC

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