Datasheet > DSP56374AE

DSP56374AE

更新时间： 2024-10-01 20:05:03

品牌	Logo	应用领域
恩智浦 - NXP		/
页数	文件大小	规格书
128页	2490K
描述
IC,DSP,24-BIT,CMOS,QFP,52PIN,PLASTIC

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DSP56374AE 技术参数

是否Rohs认证：	符合	生命周期：	Transferred
Reach Compliance Code：	unknown	风险等级：	5.78
位大小：	24	格式：	FIXED POINT
JESD-30 代码：	S-PQFP-G52	端子数量：	52
封装主体材料：	PLASTIC/EPOXY	封装代码：	QFP
封装等效代码：	QFP52,.47SQ	封装形状：	SQUARE
封装形式：	FLATPACK	电源：	3.3 V
认证状态：	Not Qualified	RAM（字数）：	6144
子类别：	Digital Signal Processors	最大压摆率：	100 mA
标称供电电压：	3.3 V	表面贴装：	YES
技术：	CMOS	端子形式：	GULL WING
端子节距：	0.635 mm	端子位置：	QUAD
Base Number Matches：	1

DSP56374AE 数据手册

DSP56374

Rev. 3, 07/2005

Freescale Semiconductor

Technical Data

Table of Contents

Section

Overview

Page

1 Features........................................ 2

2 Documentation.............................. 4

3 Signal Groupings .......................... 4

4 Maximum Ratings ....................... 24

5 Power Requirements................... 25

6 Thermal Characteristics.............. 26

7 DC Electrical Characteristics ......26

8 AC Electrical Characteristics....... 27

9 Internal Clocks............................ 27

10 External Clock Operation..........28

The DSP56374 is a high density CMOS device with 3.3 V inputs and outputs.

NOTE

This document contains information on a new product.

Specifications and information herein are subject to

change without notice.

The DSP56374 supports digital audio applications requiring sound field processing,

acoustic equalization, and other digital audio algorithms. The DSP56374 uses the high

performance, single-clock-per-cycle DSP56300 core family of programmable CMOS digital

signal processors (DSPs) combined with the audio signal processing capability of the

Freescale Semiconductor, Inc. (formerly Motorola) Symphony™ DSP family, as shown in .

Significant architectural enhancements include a barrel shifter, 24-bit addressing, and direct

memory access (DMA). The DSP56374 offers 150 million instructions per second (MIPS)

using an internal 150 MHz clock.

11 Reset, Stop, Mode Select, and

Interrupt Timing...........................29

12 Serial Host Interface SPI Protocol

Timing.......................................... 33

13 Serial Host Interface (SHI) I2C

Protocol Timing ...........................40

Data Sheet Conventions

This data sheet uses the following conventions:

14 Programming the Serial Clock .. 41

15 Enhanced Serial Audio Interface

Timing.......................................... 43

OVERBAR Used to indicate a signal that is active when pulled low (For

example, the RESET pin is active when low.)

16 Timer Timing.............................48

17 GPIO Timing .............................49

18 JTAG Timing .............................50

19 Watchdog Timer Timing............ 52

Appendix A Package Information. 53

Appendix B IBIS Model................. 63

“asserted” Means that a high true (active high) signal is high or that a low true

(active low) signal is low

“deasserted” Means that a high true (active high) signal is low or that a low true

(active low) signal is high

Examples:

Signal/

Symbol

Logic State

Signal State

Voltage*

True

False

True

Asserted

Deasserted

Asserted

V_IL/ V_OL

V_IH/ V_OH

V_IL/ V_OL

False

Deasserted

Note: *Values for V , V , V , and V are defined by individual product specifications.

12 3 4 5 6 7...128

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与DSP56374AE相关器件

型号	品牌	获取价格	描述	数据表
DSP56374AF	NXP	获取价格	IC,DSP,24-BIT,CMOS,QFP,80PIN,PLASTIC
DSP56374FS	ETC	获取价格	DSP56374FS 24-Bit Audio Digital Signal Processor
DSP56374PB	MOTOROLA	获取价格	high density CMOS device with 3.3 V inputs and outputs
DSP56374PB/D	MOTOROLA	获取价格	high density CMOS device with 3.3 V inputs and outputs
DSP56374PB/D	FREESCALE	获取价格	a high-density CMOS device
DSP56374UG	ETC	获取价格	DSP56374UG 24-Bit Digital Signal User Guide
DSP56374UM	MOTOROLA	获取价格	high density CMOS device with 3.3 V inputs and outputs
DSP56374UM/D	MOTOROLA	获取价格	high density CMOS device with 3.3 V inputs and outputs
DSP56374UM/D	FREESCALE	获取价格	a high-density CMOS device
DSP56600	FREESCALE	获取价格	Implementing Viterbi Decoders Using the VSL Instruction on DSP Families

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