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Datasheet > 驱动程序和接口 > 线路驱动器或接收器> DS92LV3241TVS
DS92LV3241TVS PDF预览

DS92LV3241TVS

更新时间： 2024-09-26 12:49:07
品牌 Logo 应用领域
德州仪器 - TI 线路驱动器或接收器驱动程序和接口接口集成电路电视PC
页数 文件大小 规格书
31页 1859K
描述
DS92LV3241/DS92LV3242 20-85 MHz 32-Bit Channel Link II Serializer / Deserializer

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中文翻译

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DS92LV3241TVS 技术参数

是否无铅：含铅是否Rohs认证：不符合
生命周期：Obsolete零件包装代码：QFP
包装说明：TFQFP,针数：64
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.39.00.01风险等级：5.4
Samacsys Confidence：Samacsys Status：Released
Samacsys PartID：588396Samacsys Pin Count：64
Samacsys Part Category：Integrated CircuitSamacsys Package Category：Other
Samacsys Footprint Name：QFP50P1200X1200X120-64Samacsys Released Date：2017-01-11 19:09:53
Is Samacsys：N其他特性：IT ALSO NEED 1.8V I/O SUPPLY
差分输出：YES驱动器位数：4
输入特性：DIFFERENTIAL接口集成电路类型：LINE DRIVER
接口标准：GENERAL PURPOSEJESD-30 代码：S-XQFP-G64
JESD-609代码：e0长度：10 mm
功能数量：4端子数量：64
最高工作温度：85 °C最低工作温度：-40 °C
封装主体材料：UNSPECIFIED封装代码：TFQFP
封装形状：SQUARE封装形式：FLATPACK, THIN PROFILE, FINE PITCH
峰值回流温度（摄氏度）：NOT SPECIFIED认证状态：Not Qualified
座面最大高度：1.2 mm最大供电电压：3.465 V
最小供电电压：3.135 V标称供电电压：3.3 V
表面贴装：YES温度等级：INDUSTRIAL
端子面层：TIN LEAD端子形式：GULL WING
端子节距：0.5 mm端子位置：QUAD
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：10 mm
Base Number Matches：1

DS92LV3241TVS 数据手册

 浏览型号DS92LV3241TVS的Datasheet PDF文件第2页浏览型号DS92LV3241TVS的Datasheet PDF文件第3页浏览型号DS92LV3241TVS的Datasheet PDF文件第4页浏览型号DS92LV3241TVS的Datasheet PDF文件第5页浏览型号DS92LV3241TVS的Datasheet PDF文件第6页浏览型号DS92LV3241TVS的Datasheet PDF文件第7页 
DS92LV3241, DS92LV3242  
www.ti.com  
SNLS314D –SEPTEMBER 2009–REVISED APRIL 2013  
DS92LV3241/DS92LV3242 20-85 MHz 32-Bit Channel Link II Serializer / Deserializer  
Check for Samples: DS92LV3241, DS92LV3242  
1
FEATURES  
APPLICATIONS  
2
•
Wide Operating Range Embedded Clock  
SER/DES  
•
Industrial Imaging (Machine-Vision) and  
Control  
–
–
–
Up to 32-bit Parallel LVCMOS Data  
20 to 85 MHz Parallel Clock  
•
Security & Surveillance Cameras and  
Infrastructure  
•
•
Medical imaging  
Up to 2.72 Gbps Application Data Paylod  
Up to 30 bits per Pixel, VGA to HD Video  
Transport and Display  
•
•
Selectable Serial LVDS Bus Width  
–
–
Dual Lane Mode (20 to 50 MHz)  
Quad Lane Mode (40 to 85 MHz)  
DESCRIPTION  
Simplified Clocking Architecture  
The DS92LV3241 (SER) serializes a 32-bit data bus  
into 2 or 4 (selectable) embedded clock LVDS serial  
channels for a data payload rate up to 2.72 Gbps  
over cables such as CATx, or backplanes FR-4  
traces. The companion DS92LV3242 (DES)  
deserializes the 2 or 4 LVDS serial data channels,  
de-skews channel-to-channel delay variations and  
converts the LVDS data stream back into a 32-bit  
LVCMOS parallel data bus.  
–
–
–
No Separate Serial Clock Line  
No reference Clock Required  
Receiver Locks to Random Data  
•
On-Chip Signal Conditioning for Robust Serial  
Connectivity  
–
–
–
–
–
Transmit Pre-Emphasis  
Data Randomization  
On-chip data Randomization/Scrambling and DC  
balance encoding and selectable serializer Pre-  
emphasis ensure a robust, low-EMI transmission over  
longer, lossy cables and backplanes. The  
Deserializer automatically locks to incoming data  
without an external reference clock or special sync  
patterns, providing an easy “plug-and-lock” operation.  
DC-Balance Encoding  
Receive Channel Deskew  
Supports up to 10m CAT-5 at 2.7 Gbps  
•
•
Integrated LVDS Terminations  
Built-in AT-SPEED BIST for End-to-End  
System Testing  
By embedding the clock in the data payload and  
including signal conditioning functions, the Channel-  
Link II SerDes devices reduce trace count, eliminate  
skew issues, simplify design effort and lower  
cable/connector cost for a wide variety of video,  
control and imaging applications. A built-in AT-  
SPEED BIST feature validates link integrity and may  
be used for system diagnostics.  
•
AC-Coupled Interconnect for Isolation and  
Fault Protection  
•
•
•
> 4KV HBM ESD Protection  
Space-Saving 64-pin TQFP Package  
Full Industrial Temperature Range : -40° to  
+85°C  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
2
All trademarks are the property of their respective owners.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2009–2013, Texas Instruments Incorporated  
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与DS92LV3241TVS相关器件

型号 品牌 获取价格 描述 数据表
DS92LV3241TVS/NOPB TI

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 		20-85 MHz 32-Bit Channel Link II Serializer 64-TQFP -40 to 85
DS92LV3241TVSX TI

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 		DS92LV3241/DS92LV3242 20-85 MHz 32-Bit Channel Link II Serializer / Deserializer
DS92LV3241TVSX NSC

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 		20-85 MHz 32-Bit Channel Link II Serializer/Deserializer
DS92LV3241TVSX/NOPB TI

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 		20-85MHz 32 位频道链接 II 串行器 | PAG | 64 | -40 to
DS92LV3242 NSC

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 		20-85 MHz 32-Bit Channel Link II Serializer/Deserializer
DS92LV3242 TI

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 		DS92LV3241/DS92LV3242 20-85 MHz 32-Bit Channel Link II Serializer / Deserializer
DS92LV3242TVS TI

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 		DS92LV3241/DS92LV3242 20-85 MHz 32-Bit Channel Link II Serializer / Deserializer
DS92LV3242TVS NSC

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 		20-85 MHz 32-Bit Channel Link II Serializer/Deserializer
DS92LV3242TVS/NOPB TI

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 		20-85MHz 32 位频道链接 II 解串器 | PAG | 64 | -40 to
DS92LV3242TVSX NSC

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 		20-85 MHz 32-Bit Channel Link II Serializer/Deserializer

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