Datasheet > 驱动程序和接口 > 线路驱动器或接收器> DS92LV3222TVSX

DS92LV3222TVSX

更新时间： 2024-09-25 06:54:43

品牌	Logo	应用领域
美国国家半导体 - NSC		线路驱动器或接收器驱动程序和接口接口集成电路
页数	文件大小	规格书
24页	1435K
描述
20-50 MHz 32-Bit Channel Link II Serializer / Deserializer

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技术参数
数据手册

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DS92LV3222TVSX 技术参数

生命周期：	Transferred	包装说明：	TFQFP,
Reach Compliance Code：	unknown	ECCN代码：	EAR99
HTS代码：	8542.39.00.01	风险等级：	5.58
Is Samacsys：	N	其他特性：	IT ALSO NEED 1.8V I/O SUPPLY
输入特性：	DIFFERENTIAL	接口集成电路类型：	LINE RECEIVER
接口标准：	GENERAL PURPOSE	JESD-30 代码：	S-XQFP-G64
长度：	10 mm	功能数量：	2
端子数量：	64	最高工作温度：	85 °C
最低工作温度：	-40 °C	封装主体材料：	UNSPECIFIED
封装代码：	TFQFP	封装形状：	SQUARE
封装形式：	FLATPACK, THIN PROFILE, FINE PITCH	认证状态：	Not Qualified
最大接收延迟：		接收器位数：	2
座面最大高度：	1.2 mm	最大供电电压：	3.465 V
最小供电电压：	3.135 V	标称供电电压：	3.3 V
表面贴装：	YES	温度等级：	INDUSTRIAL
端子形式：	GULL WING	端子节距：	0.5 mm
端子位置：	QUAD	宽度：	10 mm
Base Number Matches：	1

DS92LV3222TVSX 数据手册

January 19, 2010

DS92LV3221/DS92LV3222

20-50 MHz 32-Bit Channel Link II Serializer / Deserializer

General Description

Features

The DS92LV3221 (SER) serializes a 32-bit data bus into 2

embedded clock LVDS serial channels for a data payload rate

up to 1.6 Gbps over cables such as CATx, or backplanes FR-4

traces. The companion DS92LV3222 (DES) deserializes the

2 LVDS serial data channels, de-skews channel-to-channel

delay variations and converts the LVDS data stream back into

a 32-bit LVCMOS parallel data bus.

Wide Operating Range Embedded Clock SER/DES

■

Up to 32-bit parallel LVCMOS data

20 to 50 MHz parallel clock

—

Up to 1.6 Gbps application data paylod

Simplified Clocking Architecture

■

No separate serial clock line

No reference clock required

Receiver locks to random data

—

On-chip data Randomization/Scrambling and DC balance en-

coding and selectable serializer Pre-emphasis ensure a ro-

bust, low-EMI transmission over longer, lossy cables and

backplanes. The Deserializer automatically locks to incoming

data without an external reference clock or special sync pat-

terns, providing an easy “plug-and-lock” operation.

On-chip Signal Conditioning for Robust Serial

Connectivity

Transmit Pre-Emphasis

Data randomization

—

By embedding the clock in the data payload and including

signal conditioning functions, the Channel-Link II SerDes de-

vices reduce trace count, eliminate skew issues, simplify

design effort and lower cable/connector cost for a wide variety

of video, control and imaging applications. A built-in AT-

SPEED BIST feature validates link integrity and may be used

for system diagnostics.

DC-balance encoding

Receive channel deskew

Supports up to 10m CAT-5 at 1.6Gbps

Integrated LVDS Terminations

■

Built-in AT-SPEED BIST for end-to-end system testing

AC-coupled interconnect for isolation and fault protection

> 4KV HBM ESD protection

Space-saving 64-pin TQFP package

Full industrial temperature range : -40° to +85°C

Applications

Industrial imaging (Machine-vision) and control

■

Security & Surveillance cameras and infrastructure

Medical imaging

Block Diagram

30105727

TRI-STATE® is a registered trademark of National Semiconductor Corporation.

301057

www.national.com

12 3 4 5 6 7...24

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与DS92LV3222TVSX相关器件

型号	品牌	获取价格	描述	数据表
DS92LV3222TVSX/NOPB	TI	获取价格	20-50MHz 32 位频道链接 II 解串器 \| PAG \| 64 \| -40 to
DS92LV3241	NSC	获取价格	20-85 MHz 32-Bit Channel Link II Serializer/Deserializer
DS92LV3241	TI	获取价格	DS92LV3241/DS92LV3242 20-85 MHz 32-Bit Channel Link II Serializer / Deserializer
DS92LV3241_10	NSC	获取价格	Improving the Robustness of Channel Link Designs with Channel Link II Ser/Des
DS92LV3241_14	TI	获取价格	20-85 MHz 32-Bit Channel Link II Serializer / Deserializer
DS92LV3241TVS	NSC	获取价格	20-85 MHz 32-Bit Channel Link II Serializer/Deserializer
DS92LV3241TVS	TI	获取价格	DS92LV3241/DS92LV3242 20-85 MHz 32-Bit Channel Link II Serializer / Deserializer
DS92LV3241TVS/NOPB	TI	获取价格	20-85 MHz 32-Bit Channel Link II Serializer 64-TQFP -40 to 85
DS92LV3241TVSX	TI	获取价格	DS92LV3241/DS92LV3242 20-85 MHz 32-Bit Channel Link II Serializer / Deserializer
DS92LV3241TVSX	NSC	获取价格	20-85 MHz 32-Bit Channel Link II Serializer/Deserializer

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