Datasheet > 驱动程序和接口 > 线路驱动器或接收器> DS92LV2412

DS92LV2412

更新时间： 2024-02-02 03:42:03

品牌	Logo	应用领域
美国国家半导体 - NSC		/
页数	文件大小	规格书
40页	1108K
描述
5-50MHz 24-Bit Channel Link II Serializer and Deserializer

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技术参数
数据手册

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DS92LV2412 技术参数

是否Rohs认证：	符合	生命周期：	Transferred
包装说明：	QCCN, LCC60,.35SQ,20	Reach Compliance Code：	compliant
ECCN代码：	EAR99	HTS代码：	8542.39.00.01
风险等级：	5.12	接口集成电路类型：	LINE RECEIVER
JESD-30 代码：	S-XQCC-N60	JESD-609代码：	e3
湿度敏感等级：	3	端子数量：	60
最高工作温度：	85 °C	最低工作温度：	-40 °C
封装主体材料：	UNSPECIFIED	封装代码：	QCCN
封装等效代码：	LCC60,.35SQ,20	封装形状：	SQUARE
封装形式：	CHIP CARRIER	峰值回流温度（摄氏度）：	260
电源：	1.8,3.3 V	认证状态：	Not Qualified
最大接收延迟：		子类别：	Line Driver or Receivers
最大压摆率：	85 mA	表面贴装：	YES
温度等级：	INDUSTRIAL	端子面层：	Matte Tin (Sn)
端子形式：	NO LEAD	端子节距：	0.5 mm
端子位置：	QUAD	处于峰值回流温度下的最长时间：	40
Base Number Matches：	1

DS92LV2412 数据手册

PRELIMINARY

May 25, 2010

DS92LV2411/DS92LV2412

5-50MHz 24-Bit Channel Link II Serializer and Deserializer

General Description

Features

The DS92LV2411 (Serializer) / DS92LV2412 (Deserializer)

chipset translates a parallel 24–bit LVCMOS data interface

into a single high-speed CML serial interface with embedded

clock information. This single serial stream eliminates skew

issues between clock and data, reduces connector size and

interconnect cost for transferring a 24-bit, or less, bus over

FR-4 printed circuit board backplanes, differential or coax ca-

bles.

24–bit data, 3–bit control, 5 – 50 MHz clock

■

Application payloads up to 1.2 Gbps

AC coupled interconnects: STP up to 10 m or coax 20+ m

1.8V or 3.3V compatible LVCMOS I/O interface

Integrated terminations on Ser and Des

AT-SPEED BIST mode and reporting pin

Configurable by pins or I2C compatible serial control bus

In addition to the 24-bit data bus interface, the

DS92LV2411/12 also features a 3-bit control bus for slow

speed signals. This allows implementing video and display

applications with up to 24–bits per pixel (RGB888), or em-

bedding audio information with compressed video formats.

Power down mode minimizes power dissipation

>8 kV HBM ESD Rating

■

SERIALIZER — DS92LV2411

Supports Spread Spectrum Clocking (SSC) on inputs

■

Programmable transmit de-emphasis, receive equalization,

on-chip scrambling and DC balancing enables long distance

transmission over lossy cables and backplanes. The

DS92LV2412 automatically locks to incoming data without an

external reference clock or special sync patterns, providing

easy “plug-and-go” or “hot plug” operation. EMI is minimized

by the use of low voltage differential signaling, receiver drive

strength control, and spread spectrum clocking capability.

Data scrambler for reduced EMI

DC-balance encoder for AC coupling

Selectable output V_ODand adjustable de-emphasis

DESERIALIZER — DS92LV2412

Random data lock; no reference clock required

■

Adjustable input receiver equalization

LOCK (real time link status) reporting pin

The DS92LV2411/12 chipset is programmable though an I2C

interface as well as through pins. A built-in AT-SPEED BIST

feature validates link integrity and may be used for system

diagnostics.

Selectable Spread Spectrum Clock Generation (SSCG)

and output slew rate control (OS) to reduce EMI

Applications

The DS92LV2411 is offered in a 48-pin LLP and the

DS92LV2412 is offered in a 60-pin LLP package. Both de-

vices operate over the full industrial temperature range of -40°

C to +85°C.

Embedded Video and Display

■

Medical Imaging

Factory Automation

Office Automation — Printer, Scanner

Security and Video Surveillance

General purpose data communication

Applications Diagram

30065327

TRI-STATE^®is a registered trademark of National Semiconductor Corporation.

300653

www.national.com

12 3 4 5 6 7...40

中文翻译

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与DS92LV2412相关器件

型号	品牌	获取价格	描述	数据表
DS92LV2412SQ	NSC	获取价格	5-50MHz 24-Bit Channel Link II Serializer and Deserializer
DS92LV2412SQ/NOPB	TI	获取价格	5MHz 至 50MHz 24 位 Channel Link II 解串器 \| NKB \|
DS92LV2412SQE	NSC	获取价格	IC LINE RECEIVER, QCC60, 9 X 9 MM, 0.80 MM HEIGHT, 0.50 MM PITCH, LLP-60, Line Driver or R
DS92LV2412SQE/NOPB	TI	获取价格	5MHz 至 50MHz 24 位 Channel Link II 解串器 \| NKB \|
DS92LV2412SQENOPB	NSC	获取价格	IC LINE RECEIVER, QCC60, 9 X 9 MM, 0.80 MM HEIGHT, 0.50 MM PITCH, ROHS COMPLIANT, LLP-60,
DS92LV2412SQX	NSC	获取价格	5-50MHz 24-Bit Channel Link II Serializer and Deserializer
DS92LV2412SQX/NOPB	TI	获取价格	5MHz 至 50MHz 24 位 Channel Link II 解串器 \| NKB \|
DS92LV2412SQXNOPB	NSC	获取价格	IC LINE RECEIVER, QCC60, 9 X 9 MM, 0.80 MM HEIGHT, 0.50 MM PITCH, ROHS COMPLIANT, LLP-60,
DS92LV2421	TI	获取价格	The DS92LV2421 (Serializer)/DS92LV2422(Deseriqalizer) chipset translates a parallel 24-bit
DS92LV2421	NSC	获取价格	10 to 75 MHz, 24-bit Channel Link II Serializer and Deserializer

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