PRELIMINARY
May 25, 2010
DS92LV2411/DS92LV2412
5-50MHz 24-Bit Channel Link II Serializer and Deserializer
General Description
Features
The DS92LV2411 (Serializer) / DS92LV2412 (Deserializer)
chipset translates a parallel 24–bit LVCMOS data interface
into a single high-speed CML serial interface with embedded
clock information. This single serial stream eliminates skew
issues between clock and data, reduces connector size and
interconnect cost for transferring a 24-bit, or less, bus over
FR-4 printed circuit board backplanes, differential or coax ca-
bles.
24–bit data, 3–bit control, 5 – 50 MHz clock
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Application payloads up to 1.2 Gbps
AC coupled interconnects: STP up to 10 m or coax 20+ m
1.8V or 3.3V compatible LVCMOS I/O interface
Integrated terminations on Ser and Des
AT-SPEED BIST mode and reporting pin
Configurable by pins or I2C compatible serial control bus
In addition to the 24-bit data bus interface, the
DS92LV2411/12 also features a 3-bit control bus for slow
speed signals. This allows implementing video and display
applications with up to 24–bits per pixel (RGB888), or em-
bedding audio information with compressed video formats.
Power down mode minimizes power dissipation
>8 kV HBM ESD Rating
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SERIALIZER — DS92LV2411
Supports Spread Spectrum Clocking (SSC) on inputs
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Programmable transmit de-emphasis, receive equalization,
on-chip scrambling and DC balancing enables long distance
transmission over lossy cables and backplanes. The
DS92LV2412 automatically locks to incoming data without an
external reference clock or special sync patterns, providing
easy “plug-and-go” or “hot plug” operation. EMI is minimized
by the use of low voltage differential signaling, receiver drive
strength control, and spread spectrum clocking capability.
Data scrambler for reduced EMI
DC-balance encoder for AC coupling
Selectable output VOD and adjustable de-emphasis
DESERIALIZER — DS92LV2412
Random data lock; no reference clock required
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Adjustable input receiver equalization
LOCK (real time link status) reporting pin
The DS92LV2411/12 chipset is programmable though an I2C
interface as well as through pins. A built-in AT-SPEED BIST
feature validates link integrity and may be used for system
diagnostics.
Selectable Spread Spectrum Clock Generation (SSCG)
and output slew rate control (OS) to reduce EMI
Applications
The DS92LV2411 is offered in a 48-pin LLP and the
DS92LV2412 is offered in a 60-pin LLP package. Both de-
vices operate over the full industrial temperature range of -40°
C to +85°C.
Embedded Video and Display
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Medical Imaging
Factory Automation
Office Automation — Printer, Scanner
Security and Video Surveillance
General purpose data communication
Applications Diagram
30065327
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