Datasheet > 驱动程序和接口 > 线路驱动器或接收器> DS92LV18

DS92LV18

更新时间： 2024-02-22 00:14:32

品牌	Logo	应用领域
美国国家半导体 - NSC		/
页数	文件大小	规格书
20页	466K
描述
18-Bit Bus LVDS Serializer/Deserializer - 15-66 MHz

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技术参数
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DS92LV18 技术参数

是否无铅：	含铅	是否Rohs认证：	不符合
生命周期：	Obsolete	零件包装代码：	QFP
包装说明：	LFQFP, QFP80,.55SQ,20	针数：	80
Reach Compliance Code：	not_compliant	ECCN代码：	EAR99
HTS代码：	8542.39.00.01	风险等级：	5.33
差分输出：	YES	驱动器位数：	1
输入特性：	DIFFERENTIAL	接口集成电路类型：	LINE TRANSCEIVER
接口标准：	GENERAL PURPOSE	JESD-30 代码：	S-PQFP-G80
JESD-609代码：	e0	长度：	12 mm
湿度敏感等级：	3	功能数量：	1
端子数量：	80	最高工作温度：	85 °C
最低工作温度：	-40 °C	封装主体材料：	PLASTIC/EPOXY
封装代码：	LFQFP	封装等效代码：	QFP80,.55SQ,20
封装形状：	SQUARE	封装形式：	FLATPACK, LOW PROFILE, FINE PITCH
峰值回流温度（摄氏度）：	260	电源：	3.3 V
认证状态：	Not Qualified	最大接收延迟：
接收器位数：	1	座面最大高度：	1.6 mm
子类别：	Line Driver or Receivers	最大压摆率：	320 mA
最大供电电压：	3.45 V	最小供电电压：	3.15 V
标称供电电压：	3.3 V	表面贴装：	YES
技术：	CMOS	温度等级：	INDUSTRIAL
端子面层：	Tin/Lead (Sn/Pb)	端子形式：	GULL WING
端子节距：	0.5 mm	端子位置：	QUAD
处于峰值回流温度下的最长时间：	NOT SPECIFIED	宽度：	12 mm
Base Number Matches：	1

DS92LV18 数据手册

October 2003

DS92LV18

18-Bit Bus LVDS Serializer/Deserializer - 15-66 MHz

General Description

Features

n 15–66 MHz 18:1/1:18 Serializer/Deserializer (2.376

Gbps full duplex throughput)

The DS92LV18 Serializer/Deserializer (SERDES) pair trans-

parently translates a 18–bit parallel bus into a BLVDS serial

stream with embedded clock information. This single serial

stream simplifies transferring a 18-bit, or less, bus over PCB

traces and cables by eliminating the skew problems between

parallel data and clock paths. It saves system cost by nar-

rowing data paths that in turn reduce PCB layers, cable

width, and connector size and pins.

n Independent transmitter and receiver operation with

separate clock, enable, and power down pins

n Hot plug protection (power up high impedance) and

synchronization (receiver locks to random data)

n Wide 5% reference clock frequency tolerance for easy

system design using locally-generated clocks

n Line and local loopback modes

n Robust BLVDS serial transmission across backplanes

and cables for low EMI

n No external coding required

This SERDES pair includes built-in system and device test

capability. The line loopback feature enables the user to

check the integrity of the serial data transmission paths of

the transmitter and receiver while deserializing the serial

data to parallel data at the receiver outputs. The local loop-

back feature enables the user to check the integrity of the

transceiver from the local parallel-bus side.

n Internal PLL, no external PLL components required

n Single +3.3V power supply

n Low power: 90mA (typ) transmitter, 100mA (typ) at 66

MHz with PRBS-15 pattern

The DS92LV18 incorporates modified BLVDS signaling on

the high-speed I/O. BLVDS provides a low power and low

noise environment for reliably transferring data over a serial

transmission path. The equal and opposite currents through

the differential data path control EMI by coupling the result-

ing fringing fields together.

100 mV receiver input threshold

n Loss of lock detection and reporting pin

n Industrial −40 to +85˚C temperature range

2.0kV HBM ESD

n Compact, standard 80-pin PQFP package

Block Diagram

DS92LV18

20031201

DS200312

www.national.com

12 3 4 5 6 7...20

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与DS92LV18相关器件

型号	品牌	获取价格	描述	数据表
DS92LV18_06	NSC	获取价格	18-Bit Bus LVDS Serializer/Deserializer - 15-66 MHz
DS92LV18TVV	NSC	获取价格	18-Bit Bus LVDS Serializer/Deserializer - 15-66 MHz
DS92LV18TVV/NOPB	NSC	获取价格	IC LINE TRANSCEIVER, PQFP80, LQFP-80, Line Driver or Receiver
DS92LV18TVV/NOPB	TI	获取价格	18 位总线 LVDS 串行器/解串器 - 15-66MHz \| PN \| 80 \| -4
DS92LV18TVVX	NSC	获取价格	IC LINE TRANSCEIVER, PQFP80, LQFP-80, Line Driver or Receiver
DS92LV18TVVX/NOPB	TI	获取价格	18 位总线 LVDS 串行器/解串器 - 15-66MHz \| PN \| 80 \| -4
DS92LV222A	NSC	获取价格	Two Channel Bus LVDS MUXed Repeater
DS92LV222ATM	NSC	获取价格	Two Channel Bus LVDS MUXed Repeater
DS92LV222ATM/NOPB	TI	获取价格	LINE TRANSCEIVER, PDSO16, LEAD FREE, SOIC-16
DS92LV222ATM/NOPB	NSC	获取价格	IC LINE TRANSCEIVER, PDSO16, LEAD FREE, SOIC-16, Line Driver or Receiver

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