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DS91D176 PDF预览

DS91D176

更新时间: 2024-11-24 04:15:23
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美国国家半导体 - NSC /
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14页 374K
描述
Multipoint-LVDS (M-LVDS) Transceivers

DS91D176 数据手册

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February 29, 2008  
DS91D176/DS91C176  
100 MHz Single Channel M-LVDS Transceivers  
signals. The DS91D176 has a M-LVDS type 1 receiver input  
with no offset. The DS91C176 has an M-LVDS type 2 receiver  
which enable failsafe functionality.  
General Description  
The DS91C176 and DS91D176 are 100 MHz single channel  
M-LVDS (Multipoint Low Voltage Differential Signaling)  
transceivers designed for applications that utilize multipoint  
networks (e.g. clock distribution in ATCA and uTCA based  
systems). M-LVDS is a new bus interface standard (TIA/  
EIA-899) optimized for multidrop networks. Controlled edge  
rates, tight input receiver thresholds and increased drive  
strength are sone of the key enhancments that make M-LVDS  
devices an ideal choice for distributing signals via multipoint  
networks.  
Features  
DC to 100+ MHz / 200+ Mbps low power, low EMI  
operation  
Optimal for ATCA, uTCA clock distribution networks  
Meets or exceeds TIA/EIA-899 M-LVDS Standard  
Wide Input Common Mode Voltage for Increased Noise  
Immunity  
The DS91C176/DS91D176 are half-duplex transceivers that  
accept LVTTL/LVCMOS signals at the driver inputs and con-  
vert them to differential M-LVDS signals. The receiver inputs  
accept low voltage differential signals (LVDS, B-LVDS, M-  
LVDS, LV-PECL and CML) and convert them to 3V LVCMOS  
DS91D176 has type 1 receiver input  
DS91C176 has type 2 receiver with fail-safe  
Industrial temperature range  
Space saving SOIC-8 package  
Typical Application in an ATCA Clock Distribution Network  
20024630  
© 2008 National Semiconductor Corporation  
200246  
www.national.com  

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