DS91C176, DS91D176
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SNLS146L –MARCH 2006–REVISED APRIL 2013
DS91D176/DS91C176 100 MHz Single Channel M-LVDS Transceivers
Check for Samples: DS91C176, DS91D176
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FEATURES
DESCRIPTION
The DS91C176 and DS91D176 are 100 MHz single
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DC to 100+ MHz / 200+ Mbps Low Power, Low
EMI Operation
channel M-LVDS (Multipoint Low Voltage Differential
Signaling) transceivers designed for applications that
utilize multipoint networks (e.g. clock distribution in
ATCA and uTCA based systems). M-LVDS is a new
bus interface standard (TIA/EIA-899) optimized for
multidrop networks. Controlled edge rates, tight input
receiver thresholds and increased drive strength are
sone of the key enhancements that make M-LVDS
devices an ideal choice for distributing signals via
multipoint networks.
Optimal for ATCA, uTCA Clock Distribution
Networks
Meets or Exceeds TIA/EIA-899 M-LVDS
Standard
Wide Input Common Mode Voltage for
Increased Noise Immunity
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DS91D176 has Type 1 Receiver Input
DS91C176 has Type 2 Receiver with Fail-safe
Industrial Temperature Range
The
DS91C176/DS91D176
are
half-duplex
transceivers that accept LVTTL/LVCMOS signals at
the driver inputs and convert them to differential M-
LVDS signals. The receiver inputs accept low voltage
differential signals (LVDS, B-LVDS, M-LVDS, LV-
PECL and CML) and convert them to 3V LVCMOS
signals. The DS91D176 has a M-LVDS type 1
receiver input with no offset. The DS91C176 has an
Space Saving SOIC-8 Package
M-LVDS type
functionality.
2 receiver which enable failsafe
Typical Application in an ATCA Clock Distribution Network
Slot Card N
Slot Card N+1
MLVDS Transceivers
MLVDS Transceivers
80W RT
80W RT
CLK1A (8 KHz)
CLK1B (8 KHz)
80W RT
80W RT
80W RT
80W RT
CLK2A (19.44 MHz)
CLK2B (19.44 MHz)
80W RT
80W RT
80W RT
80W RT
CLK3A (User Defined up to 100 MHz)
CLK3B (User Defined up to 100 MHz)
80W RT
80W RT
ATCA Backplane
Figure 1. System Diagram
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PRODUCTION DATA information is current as of publication date.
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