Datasheet > DS90UB914A-Q1

DS90UB914A-Q1

更新时间： 2024-09-28 02:58:27

品牌	Logo	应用领域
德州仪器 - TI		光电二极管
页数	文件大小	规格书
68页	1317K
描述
25-MHz to 100-MHz 10/12-Bit FPD-Link III Deserializer

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数据手册

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DS90UB914A-Q1 数据手册

DS90UB913A-Q1, DS90UB914A-Q1

www.ti.com

SNLS443A –MAY 2013–REVISED JUNE 2013

DS90UB913A-Q1/DS90UB914A-Q1 25 to100 MHz 10/12-Bit

FPD-Link III Serializer and Deserializer

Check for Samples: DS90UB913A-Q1, DS90UB914A-Q1

FEATURES

DESCRIPTION

The

DS90UB913A-Q1/DS90UB914A-Q1

chipset

•

25 MHz to 100 MHz Input Pixel Clock Support

Coaxial or Single Differential Pair Interconnect

Programmable Data Payload:

offers a FPD-Link III interface with a high-speed

forward channel and a bidirectional control channel

for data transmission over a single coaxial cable or

differential pair. The DS90UB913A-Q1/914A-Q1

chipset incorporates differential signaling on both the

high-speed forward channel and bidirectional control

channel data paths. The serializer/deserializer pair is

targeted for connections between imagers and video

processors in an ECU (Electronic Control Unit). This

chipset is ideally suited for driving video data

requiring up to 12-bit pixel depth plus two

synchronization signals along with bidirectional

control channel bus.

–

10-bit Payload up to 100 Mhz

12-bit Payload up to 75 MHz

•

Continuous Low Latency Bidirectional Control

Interface Channel with I2C™ Support @400

kHz

•

2:1 Multiplexer to choose between two input

images

Embedded Clock with DC-balanced Coding to

Support AC-coupled Interconnects

The deserializer features a multiplexer to allow

selection between two input imagers, one active at a

time. The primary video transport converts 10-bit or

12-bit data to a single high-speed serial stream, along

with a separate low latency bidirectional control

channel transport that accepts control information

from an I2C port and is independent of video blanking

period.

Capable of Driving up to 15m Coaxial or 20m

Shielded Twisted-pair Cables

Receive Equalizer Automatically Adapts for

Changes in Cable Loss

4 Dedicated General Purpose Input (GPI)/

Output (GPO)

LOCK Output Reporting Pin and @SPEED

BIST Diagnosis Feature to Validate Link

Integrity

Using TI’s embedded clock technology allows

transparent full-duplex communication over a single

differential pair, carrying asymmetrical bidirectional

control channel information in both directions. This

single serial stream simplifies transferring a wide data

bus over PCB traces and cable by eliminating the

skew problems between parallel data and clock

paths. This significantly saves system cost by

narrowing data paths that in turn reduce PCB layers,

cable width, and connector size and pins. In addition,

the Deserializer inputs provide adaptive equalization

to compensate for loss from the media over longer

distances. Internal DC-balanced encoding/decoding is

used to support AC-coupled interconnects. The

DS90UB913A-Q1 serializer is offered in a 32-pin

•

1.8V, 2.8V or 3.3V-Compatible Parallel Inputs

on Serializer

•

Single Power Supply at 1.8V

ISO 10605 and IEC 61000-4-2 ESD Compliant

Automotive Grade Product: AEC-Q100 Grade 2

qualified

•

Temperature Range −40°C to +105°C

Small Serializer Rootprint (5mm x 5mm)

EMI/EMC Mitigation - Deserializer

–

Programmable Spread Spectrum (SSCG)

Outputs

WQFN

package

and

the

DS90UB914A-Q1

deserializer is offered in a 48-pin WQFN package.

–

Receiver Staggered Outputs

APPLICATIONS

•

Front or Rear-View Camera for Collision

Mitigation

Surround View for Parking Assistance

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

I2C is a trademark of Philips Semiconductor Corp..

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

12 3 4 5 6 7...68

中文翻译

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与DS90UB914A-Q1相关器件

型号	品牌	获取价格	描述	数据表
DS90UB914ATRHSJQ1	TI	获取价格	DS90UB913A-Q1/DS90UB914A-Q1 25 to100 MHz 10/12-Bit
DS90UB914ATRHSRQ1	TI	获取价格	DS90UB913A-Q1/DS90UB914A-Q1 25 to100 MHz 10/12-Bit
DS90UB914ATRHSTQ1	TI	获取价格	DS90UB913A-Q1/DS90UB914A-Q1 25 to100 MHz 10/12-Bit
DS90UB914Q	TAOS	获取价格	DS90UB913Q/DS90UB914Q 10-100MHz 10/12- Bit DC-Balanced FPD-Link III Serializer and Deseria
DS90UB914Q-Q1	TI	获取价格	10MHz 至 100MHz、10/12 位 FPD-Link III 解串器
DS90UB914QSQ/NOPB	TAOS	获取价格	DS90UB913Q/DS90UB914Q 10-100MHz 10/12- Bit DC-Balanced FPD-Link III Serializer and Deseria
DS90UB914QSQ/NOPB	TI	获取价格	10MHz 至 100MHz、10/12 位 FPD-Link III 解串器 \| RHS
DS90UB914QSQE/NOPB	TI	获取价格	10MHz 至 100MHz、10/12 位 FPD-Link III 解串器 \| RHS
DS90UB914QSQE/NOPB	TAOS	获取价格	DS90UB913Q/DS90UB914Q 10-100MHz 10/12- Bit DC-Balanced FPD-Link III Serializer and Deseria
DS90UB914QSQX/NOPB	TAOS	获取价格	DS90UB913Q/DS90UB914Q 10-100MHz 10/12- Bit DC-Balanced FPD-Link III Serializer and Deseria

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