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DS90UB904Q-Q1 PDF预览

DS90UB904Q-Q1

更新时间: 2024-09-28 11:07:51
品牌 Logo 应用领域
德州仪器 - TI 驱动光电二极管线路驱动器或接收器驱动程序和接口
页数 文件大小 规格书
45页 1099K
描述
具有双向控制通道的 10 - 43MHz 18 位色彩 FPD-Link III 解串器

DS90UB904Q-Q1 数据手册

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DS90UB903Q, DS90UB904Q  
www.ti.com  
SNLS332E JUNE 2010REVISED APRIL 2013  
DS90UB903Q/DS90UB904Q 10 - 43MHz 18 Bit Color FPD-Link III Serializer and  
Deserializer with Bidirectional Control Channel  
Check for Samples: DS90UB903Q, DS90UB904Q  
1
FEATURES  
DESCRIPTION  
The DS90UB903Q/DS90UB904Q chipset offers a  
FPD-Link III interface with a high-speed forward  
channel and a bidirectional control channel for data  
transmission over a single differential pair. The  
2
10 MHz to 43 MHz Input PCLK Support  
210 Mbps to 903 Mbps Data Throughput  
Single Differential Pair Interconnect  
DS90UB903Q/904Q  
incorporates  
differential  
Bidirectional Control Interface Channel with  
I2C Support  
signaling on both the high-speed forward channel and  
bidirectional control channel data paths. The  
Serializer/ Deserializer pair is targeted for direct  
connections between graphics host controller and  
displays modules. This chipset is ideally suited for  
driving video data to displays requiring 18-bit color  
depth (RGB666 + HS, VS, and DE) along with  
bidirectional control channel bus. The primary  
transport converts 21 bit data over a single high-  
speed serial stream, along with a separate low  
latency bidirectional control channel transport that  
accepts control information from an I2C port. Using  
TI’s embedded clock technology allows transparent  
full-duplex communication over a single differential  
pair, carrying asymmetrical bidirectional control  
channel information in both directions. This single  
serial stream simplifies transferring a wide data bus  
over PCB traces and cable by eliminating the skew  
problems between parallel data and clock paths. This  
significantly saves system cost by narrowing data  
paths that in turn reduce PCB layers, cable width,  
and connector size and pins.  
Embedded Clock with DC Balanced Coding to  
Support AC-Coupled Interconnects  
Capable to Drive up to 10 Meters Shielded  
Twisted-Pair  
I2C Compatible Serial Interface  
Single Hardware Device Addressing Pin  
Up to 4 General Purpose Input (GPI)/ Output  
(GPO)  
LOCK Output Reporting Pin and AT-SPEED  
BIST Diagnosis Feature to Validate Link  
Integrity  
Integrated Termination Resistors  
1.8V- or 3.3V-Compatible Parallel Bus Interface  
Single Power Supply at 1.8V  
ISO 10605 ESD and IEC 61000-4-2 ESD  
Compliant  
Automotive Grade Product: AEC-Q100 Grade 2  
Qualified  
In addition, the Deserializer inputs provide  
equalization control to compensate for loss from the  
media over longer distances. Internal DC balanced  
encoding/decoding is used to support AC-Coupled  
interconnects.  
Temperature Range 40°C to +105°C  
No Reference Clock Required on Deserializer  
Programmable Receive Equalization  
EMI/EMC Mitigation  
The Serializer is offered in a 40-pin lead in WQFN  
and Deserializer is offered in a 48-pin WQFN  
packages.  
DES Programmable Spread Spectrum  
(SSCG) Outputs  
DES Receiver Staggered Outputs  
APPLICATIONS  
Automotive Display Systems  
Central Information Displays  
Navigation Displays  
Rear Seat Entertainment  
Touch Screen Displays  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
2
All trademarks are the property of their respective owners.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2010–2013, Texas Instruments Incorporated  

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