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DS90CR288AMTD PDF预览

DS90CR288AMTD

更新时间: 2024-11-04 22:40:19
品牌 Logo 应用领域
美国国家半导体 - NSC 线路驱动器或接收器驱动程序和接口接口集成电路光电二极管
页数 文件大小 规格书
15页 311K
描述
+3.3V Rising Edge Data Strobe LVDS 28-Bit Channel Link-85 MHZ

DS90CR288AMTD 技术参数

是否Rohs认证: 不符合生命周期:Transferred
包装说明:TSSOP-56Reach Compliance Code:not_compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.13差分输出:YES
输入特性:DIFFERENTIAL接口集成电路类型:LINE RECEIVER
接口标准:EIA-644; TIA-644JESD-30 代码:R-PDSO-G56
JESD-609代码:e0长度:14 mm
湿度敏感等级:2功能数量:1
端子数量:56最高工作温度:70 °C
最低工作温度:-10 °C封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP56,.3,20
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度):235电源:3.3 V
认证状态:Not Qualified最大接收延迟:3.5 ns
接收器位数:4座面最大高度:1.2 mm
子类别:Line Driver or Receivers最大压摆率:135 mA
最大供电电压:3.6 V最小供电电压:3 V
标称供电电压:3.3 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:GULL WING
端子节距:0.5 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30宽度:6.1 mm
Base Number Matches:1

DS90CR288AMTD 数据手册

 浏览型号DS90CR288AMTD的Datasheet PDF文件第2页浏览型号DS90CR288AMTD的Datasheet PDF文件第3页浏览型号DS90CR288AMTD的Datasheet PDF文件第4页浏览型号DS90CR288AMTD的Datasheet PDF文件第5页浏览型号DS90CR288AMTD的Datasheet PDF文件第6页浏览型号DS90CR288AMTD的Datasheet PDF文件第7页 
October 1999  
DS90CR287/DS90CR288A  
+3.3V Rising Edge Data Strobe LVDS 28-Bit Channel  
Link-85 MHZ  
General Description  
Features  
n 20 to 85 MHZ shift clock support  
n 50% duty cycle on receiver output clock  
n Best–in–Class Set & Hold Times on TxINPUTs  
n Low power consumption  
The DS90CR287 transmitter converts 28 bits of CMOS/TTL  
data into four LVDS (Low Voltage Differential Signaling) data  
streams. A phase-locked transmit clock is transmitted in par-  
allel with the data streams over a fifth LVDS link. Every cycle  
of the transmit clock 28 bits of input data are sampled and  
transmitted. The DS90CR288A receiver converts the four  
LVDS data streams back into 28 bits of CMOS/TTL data. At  
a transmit clock frequency of 85 MHZ, 28 bits of TTL data are  
transmitted at a rate of 595 Mbps per LVDS data channel.  
Using a 85 MHZ clock, the data throughput is 2.38 Gbit/s  
(297.5 Mbytes/sec).  
±
n
1V common mode range (around +1.2V)  
n Narrow bus reduces cable size and cost  
n Up to 2.38 Gbps throughput  
n Up to 297.5 Megabytes/sec bandwidth  
n 345 mV (typ) swing LVDS devices for low EMI  
n PLL requires no external components  
n Rising edge data strobe  
This chipset is an ideal means to solve EMI and cable size  
problems associated with wide, high speed TTL interfaces.  
n Compatible with TIA/EIA-644 LVDS standard  
n Low profile 56-lead TSSOP package  
Block Diagrams  
DS90CR287  
DS90CR288A  
DS101087-27  
DS101087-1  
Order Number DS90CR288AMTD  
See NS Package Number MTD56  
Order Number DS90CR287MTD  
See NS Package Number MTD56  
TRI-STATE® is a registered trademark of National Semiconductor Corporation.  
© 1999 National Semiconductor Corporation  
DS101087  
www.national.com  

DS90CR288AMTD 替代型号

型号 品牌 替代类型 描述 数据表
DS90CR288AMTDX NSC

功能相似

IC LINE RECEIVER, PDSO56, TSSOP-56, Line Driver or Receiver
DS90CR288AMTD/NOPB TI

功能相似

DS90CR287/DS90CR288A 3.3V Rising Edge Data Strobe LVDS 28-Bit Channel Link - 85MHz

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DS90CR288ASLCX TI

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