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DS90CR288 PDF预览

DS90CR288

更新时间: 2024-11-04 22:40:19
品牌 Logo 应用领域
美国国家半导体 - NSC /
页数 文件大小 规格书
12页 233K
描述
+3.3V Rising Edge Data Strobe LVDS 28-Bit Channel Link Receiver - 75 MHz

DS90CR288 数据手册

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May 2002  
DS90CR288  
+3.3V Rising Edge Data Strobe LVDS 28-Bit Channel  
Link Receiver - 75 MHz  
General Description  
Features  
n 20 to 75 MHz shift clock support  
n 50% duty cycle on receiver output clock  
The DS90CR287 (see DS90CR287/288A datasheet) trans-  
mitter converts 28 bits of CMOS/TTL data into four LVDS  
(Low Voltage Differential Signaling) data streams. A phase-  
locked transmit clock is transmitted in parallel with the data  
streams over a fifth LVDS link. Every cycle of the transmit  
clock 28 bits of input data are sampled and transmitted. The  
DS90CR288 receiver converts the four LVDS data streams  
back into 28 bits of CMOS/TTL data. At a transmit clock  
frequency of 75 MHz, 28 bits of TTL data are transmitted at  
a rate of 525 Mbps per LVDS data channel. Using a 75 MHz  
clock, the data throughput is 2.10 Gbit/s (262.5 Mbytes/sec).  
n Best-in-Class Set & Hold Times on TxINPUTs and  
RxOUTPUTs  
n Low power consumption  
<
n Tx + Rx Powerdown mode 400µW (max)  
±
n
1V common-mode range (around +1.2V)  
n Narrow bus reduces cable size and cost  
n Up to 2.10 Gbps throughput  
n Up to 262.5 Mbytes/sec bandwidth  
n 345 mV (typ) swing LVDS devices for low EMI  
n PLL requires no external components  
n Rising edge data strobe  
Complete specifications for the DS90CR287 are located in  
the DS90CR287/DS90CR288A datasheet. The DS90CR287  
supports clock rates from 20 to 85 MHz.  
n Compatible with TIA/EIA-644 LVDS standard  
n Low profile 56-lead TSSOP package  
This chipset is an ideal means to solve EMI and cable size  
problems associated with wide, high-speed TTL interfaces.  
Block Diagrams  
DS90CR287  
DS90CR288  
DS100872-27  
DS100872-1  
Order Number DS90CR288MTD  
See NS Package Number MTD56  
Order Number DS90CR287MTD  
See NS Package Number MTD56  
(See DS90CR287/DS90CR288A datasheet)  
© 2002 National Semiconductor Corporation  
DS100872  
www.national.com  

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