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DS90CR286AMTD PDF预览

DS90CR286AMTD

更新时间： 2024-11-03 11:07:59
品牌 Logo 应用领域
德州仪器 - TI 驱动光电二极管接口集成电路线路驱动器或接收器驱动程序和接口
页数 文件大小 规格书
25页 1191K
描述
+3.3V 上升沿数据选通 LVDS 28 位 Channel Link 接收器 - 66MHz | DGG | 56 | -40 to 85

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DS90CR286AMTD 技术参数

生命周期：Not Recommended零件包装代码：TSSOP
包装说明：TSSOP, TSSOP56,.3,20针数：56
Reach Compliance Code：not_compliantECCN代码：EAR99
HTS代码：8542.39.00.01Factory Lead Time：1 week
风险等级：7.4差分输出：NO
输入特性：DIFFERENTIAL接口集成电路类型：LINE RECEIVER
接口标准：EIA-644; TIA-644JESD-30 代码：R-PDSO-G56
JESD-609代码：e0长度：14 mm
湿度敏感等级：2功能数量：4
端子数量：56最高工作温度：85 °C
最低工作温度：-40 °C输出特性：DIFFERENTIAL
输出极性：COMPLEMENTARY封装主体材料：PLASTIC/EPOXY
封装代码：TSSOP封装等效代码：TSSOP56,.3,20
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度（摄氏度）：235电源：3.3 V
认证状态：Not Qualified最大接收延迟：
接收器位数：4筛选级别：AEC-Q100
座面最大高度：1.2 mm子类别：Line Driver or Receivers
最大压摆率：105 mA最大供电电压：3.6 V
最小供电电压：3 V标称供电电压：3.3 V
电源电压1-最大：3.6 V电源电压1-分钟：3 V
电源电压1-Nom：3.3 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子面层：Tin/Lead (Sn/Pb)端子形式：GULL WING
端子节距：0.5 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED宽度：6.1 mm
Base Number Matches：1

DS90CR286AMTD 数据手册

 浏览型号DS90CR286AMTD的Datasheet PDF文件第2页浏览型号DS90CR286AMTD的Datasheet PDF文件第3页浏览型号DS90CR286AMTD的Datasheet PDF文件第4页浏览型号DS90CR286AMTD的Datasheet PDF文件第5页浏览型号DS90CR286AMTD的Datasheet PDF文件第6页浏览型号DS90CR286AMTD的Datasheet PDF文件第7页 
DS90CR285, DS90CR286  
www.ti.com  
SNLS130C –MARCH 1999–REVISED MARCH 2013  
DS90CR285/DS90CR286 +3.3V Rising Edge Data Strobe LVDS 28-Bit Channel Link-66 MHz  
Check for Samples: DS90CR285, DS90CR286  
1
FEATURES  
DESCRIPTION  
The DS90CR285 transmitter converts 28 bits of  
LVCMOS/LVTTL data into four LVDS (Low Voltage  
Differential Signaling) data streams. A phase-locked  
transmit clock is transmitted in parallel with the data  
streams over a fifth LVDS link. Every cycle of the  
transmit clock 28 bits of input data are sampled and  
transmitted. The DS90CR286 receiver converts the  
LVDS data streams back into 28 bits of  
LVCMOS/LVTTL data. At a transmit clock frequency  
of 66 MHz, 28 bits of TTL data are transmitted at a  
rate of 462 Mbps per LVDS data channel. Using a 66  
MHz clock, the data throughput is 1.848 Gbit/s (231  
Mbytes/s).  
2
•
Single +3.3V Supply  
•
Chipset (Tx + Rx) Power Consumption <250  
mW (typ)  
•
•
•
•
•
•
•
•
Power-Down Mode (<0.5 mW total)  
Up to 231 Megabytes/sec Bandwidth  
Up to 1.848 Gbps Data Throughput  
Narrow Bus Reduces Cable Size  
290 mV Swing LVDS Devices for Low EMI  
+1V Common Mode Range (Around +1.2V)  
PLL Requires no External Components  
Both Devices are Offered in a Low Profile 56-  
Lead TSSOP Package  
The multiplexing of the data lines provides  
a
substantial cable reduction. Long distance parallel  
single-ended buses typically require a ground wire  
per active signal (and have very limited noise  
rejection capability). Thus, for a 28-bit wide data and  
one clock, up to 58 conductors are required. With the  
Channel Link chipset as few as 11 conductors (4 data  
pairs, 1 clock pair and a minimum of one ground) are  
needed. This provides a 80% reduction in required  
cable width, which provides a system cost savings,  
reduces connector physical size and cost, and  
reduces shielding requirements due to the cables'  
smaller form factor.  
•
•
•
•
Rising Edge Data Strobe  
Compatible with TIA/EIA-644 LVDS Standard  
ESD Rating > 7 kV  
Operating Temperature: −40°C to +85°C  
The 28 LVCMOS/LVTTL inputs can support a variety  
of signal combinations. For example, seven 4-bit  
nibbles or three 9-bit (byte + parity) and 1 control.  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
2
All trademarks are the property of their respective owners.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 1999–2013, Texas Instruments Incorporated  
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DS90CR286AMTD 替代型号

型号 品牌 替代类型 描述 数据表
DS90CR286AMTD/NOPB TI

类似代替

 +3.3V 上升沿数据选通 LVDS 28 位 Channel Link 接收器 - 66
DS90CR286MTD/NOPB TI

类似代替

 DS90CR285/DS90CR286 3.3V Rising Edge Data Strobe LVDS 28-Bit Channel Link-66 MHz

与DS90CR286AMTD相关器件

型号 品牌 获取价格 描述 数据表
DS90CR286AMTD/NOPB TI

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 		+3.3V 上升沿数据选通 LVDS 28 位 Channel Link 接收器 - 66
DS90CR286AMTDX ETC

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 		Video Link Interface
DS90CR286AMTDX/NOPB TI

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 		+3.3V Rising Edge Data Strobe LVDS Receiver 28-Bit Channel Link - 66 MHz 56-TSSOP -40 to 8
DS90CR286AQ NSC

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 		+3.3V Rising Edge Data Strobe LVDS Receiver 28-Bit Channel Link-66 MHz, +3.3V Rising Edge
DS90CR286A-Q1 TI

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 		+3.3V 上升沿数据选通 LVDS 28 位汽车类 Channel Link 接收器 -
DS90CR286AQMT NSC

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 		+3.3V Rising Edge Data Strobe LVDS Receiver 28-Bit Channel Link-66 MHz, +3.3V Rising Edge
DS90CR286AQMT/NOPB TI

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 		+3.3V 上升沿数据选通 LVDS 28 位汽车类 Channel Link 接收器 -
DS90CR286AQMTX/NOPB TI

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 		+3.3V Rising Edge Data Strobe LVDS Receiver 28-Bit Channel Link - 66 MHz 56-TSSOP -40 to 8
DS90CR286ASLC NSC

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 		IC QUAD LINE RECEIVER, PBGA64, 0.80 MM PITCH, FBGA-64, Line Driver or Receiver
DS90CR286ASLCX NSC

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 		IC QUAD LINE RECEIVER, PBGA64, 0.80 MM PITCH, FBGA-64, Line Driver or Receiver

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