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DS90CF563MTD/NOPB PDF预览

DS90CF563MTD/NOPB

更新时间： 2024-09-15 14:41:51
品牌 Logo 应用领域
德州仪器 - TI 驱动光电二极管接口集成电路驱动器
页数 文件大小 规格书
17页 1188K
描述
QUAD LINE DRIVER, PDSO48, PLASTIC, TSSOP-48

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DS90CF563MTD/NOPB 技术参数

是否无铅：不含铅是否Rohs认证：符合
生命周期：Obsolete零件包装代码：TSSOP
包装说明：TSSOP, TSSOP48,.3,20针数：48
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8542.39.00.01风险等级：5.63
Is Samacsys：N差分输出：YES
驱动器位数：4输入特性：STANDARD
接口集成电路类型：LINE DRIVER接口标准：EIA-644; TIA-644
JESD-30 代码：R-PDSO-G48JESD-609代码：e3
长度：12.5 mm湿度敏感等级：2
功能数量：4端子数量：48
最高工作温度：70 °C最低工作温度：-10 °C
封装主体材料：PLASTIC/EPOXY封装代码：TSSOP
封装等效代码：TSSOP48,.3,20封装形状：RECTANGULAR
封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度（摄氏度）：260
电源：5 V认证状态：Not Qualified
最大接收延迟：座面最大高度：1.2 mm
子类别：Line Driver or Receivers最大压摆率：45 mA
标称供电电压：5 V表面贴装：YES
技术：CMOS温度等级：COMMERCIAL
端子面层：Matte Tin (Sn)端子形式：GULL WING
端子节距：0.5 mm端子位置：DUAL
处于峰值回流温度下的最长时间：40宽度：6.1 mm
Base Number Matches：1

DS90CF563MTD/NOPB 数据手册

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DS90CF563, DS90CF564  
www.ti.com  
SNLS107E –JULY 1997–REVISED APRIL 2013  
DS90CF563/DS90CF564 LVDS 18-Bit Color Flat Panel Display (FPD) Link - 65 MHz  
Check for Samples: DS90CF563, DS90CF564  
1
FEATURES  
DESCRIPTION  
The DS90CF563 transmitter converts 21 bits of  
CMOS/TTL data into three LVDS (Low Voltage  
Differential Signaling) data streams. A phase-locked  
transmit clock is transmitted in parallel with the data  
streams over a fourth LVDS link. Every cycle of the  
transmit clock 21 bits of input data are sampled and  
transmitted. The DS90CF564 receiver converts the  
LVDS data streams back into 21 bits of CMOS/TTL  
data. At a transmit clock frequency of 65 MHz, 18 bits  
of RGB data and 3 bits of LCD timing and control  
data (FPLINE, FPFRAME, DRDY) are transmitted at  
a rate of 455 Mbps per LVDS data channel. Using a  
65 MHz clock, the data throughput is 171 Mbytes per  
second. These devices are offered with falling edge  
data strobes for convenient interface with a variety of  
graphics and LCD panel controllers.  
2
•
20 to 65 MHz Shift Clk Support  
•
•
•
•
•
•
•
•
•
•
•
•
Up to 171 Mbytes/s Bandwidth  
Cable Size is Reduced to Save Cost  
290 mV Swing LVDS Devices for Low EMI  
Low Power CMOS Design (< 550 mW typ)  
Power-down Mode Saves Power (< 0.25 mW)  
PLL Requires No External Components  
Low Profile 48-Lead TSSOP Package  
Falling Edge Data Strobe  
Compatible with TIA/EIA-644 LVDS Standard  
Single Pixel Per Clock XGA (1024 x 768)  
Supports VGA, SVGA, XGA and Higher  
1.3 Gbps Throughput  
This chipset is an ideal means to solve EMI and  
cable size problems associated with wide, high speed  
TTL interfaces.  
Block Diagram  
Figure 1. DS90CF563  
DS90CF563MTD is no longer available.  
Figure 2. DS90CF564  
See Package Number DGG0048A  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
All trademarks are the property of their respective owners.  
2
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 1997–2013, Texas Instruments Incorporated  
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DS90CF563MTD/NOPB 替代型号

型号 品牌 替代类型 描述 数据表
DS90CF563MTDX/NOPB TI

功能相似

 IC QUAD LINE DRIVER, PDSO48, LOW PROFILE, PLASTIC, TSSOP-48, Line Driver or Receiver

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DS90CF564MTD/NOPB TI

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DS90CF564MTDX/NOPB TI

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