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DS90CF388AVJD

更新时间： 2024-09-13 21:55:51

品牌	Logo	应用领域
美国国家半导体 - NSC		接口集成电路光电二极管
页数	文件大小	规格书
19页	412K
描述
Dual Pixel LVDS Display Interface / FPD-Link

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中文翻译

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技术参数
数据手册
替代型号

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DS90CF388AVJD 技术参数

是否Rohs认证：	不符合	生命周期：	Transferred
包装说明：	TQFP-100	Reach Compliance Code：	not_compliant
ECCN代码：	EAR99	HTS代码：	8542.39.00.01
风险等级：	5.15	差分输出：	YES
输入特性：	DIFFERENTIAL	接口集成电路类型：	LINE RECEIVER
接口标准：	EIA-644; TIA-644	JESD-30 代码：	S-PQFP-G100
JESD-609代码：	e0	长度：	14 mm
湿度敏感等级：	3	功能数量：	9
端子数量：	100	最高工作温度：	70 °C
最低工作温度：	-10 °C	封装主体材料：	PLASTIC/EPOXY
封装代码：	TFQFP	封装等效代码：	TQFP100,.63SQ
封装形状：	SQUARE	封装形式：	FLATPACK, THIN PROFILE, FINE PITCH
峰值回流温度（摄氏度）：	260	电源：	3.3 V
认证状态：	Not Qualified	最大接收延迟：
接收器位数：	9	座面最大高度：	1.2 mm
子类别：	Line Driver or Receivers	最大供电电压：	3.6 V
最小供电电压：	3 V	标称供电电压：	3.3 V
表面贴装：	YES	技术：	CMOS
温度等级：	COMMERCIAL	端子面层：	Tin/Lead (Sn/Pb)
端子形式：	GULL WING	端子节距：	0.5 mm
端子位置：	QUAD	处于峰值回流温度下的最长时间：	40
宽度：	14 mm	Base Number Matches：	1

DS90CF388AVJD 数据手册

October 2002

DS90C387A/DS90CF388A

Dual Pixel LVDS Display Interface / FPD-Link

General Description

The DS90C387A/DS90CF388A transmitter/receiver pair is

designed to support dual pixel data transmission between

Host and Flat Panel Display up to QXGA resolutions. The

transmitter converts 48 bits (Dual Pixel 24-bit color) of

CMOS/TTL data and 3 control bits into 8 LVDS (Low Voltage

Differential Signalling) data streams. At a maximum dual

pixel rate of 112MHz, LVDS data line speed is 784Mbps,

providing a total throughput of 5.7Gbps (714 Megabytes per

second).

vides a reliable interface based on LVDS technology that

delivers the bandwidth needed for high-resolution panels

while maximizing bit times, and keeping clock rates low to

reduce EMI and shielding requirements. For more details,

please refer to the “Applications Information” section of this

datasheet.

Features

n Supports SVGA through QXGA panel resolutions

n 32.5 to 112/170MHz clock support

The LDI chipset is improved over prior generations of

FPD-Link devices and offers higher bandwidth support and

longer cable drive. To increase bandwidth, the maximum

pixel clock rate is increased to 112 MHz and 8 serialized

LVDS outputs are provided. Cable drive is enhanced with a

user selectable pre-emphasis feature that provides addi-

tional output current during transitions to counteract cable

loading effects.

n Drives long, low cost cables

n Up to 5.7 Gbps bandwidth

n Pre-emphasis reduces cable loading effects

n Dual pixel architecture supports interface to GUI and

timing controller; optional single pixel transmitter inputs

support single pixel GUI interface

n Transmitter rejects cycle-to-cycle jitter

n 5V tolerant on data and control input pins

n Programmable transmitter data and control strobe select

(rising or falling edge strobe)

n Backward compatible with FPD-Link

n Compatible with ANSI/TIA/EIA-644-1995 LVDS Standard

The DS90C387A transmitter provides a second LVDS output

clock. Both LVDS clocks are identical. This feature supports

backward compatibility with the previous generation of

FPD-Link Receivers - the second clock allows the transmit-

ter to interface to panels using a ’dual pixel’ configuration of

two 24-bit or 18-bit FPD-Link receivers.

This chipset is an ideal means to solve EMI and cable size

problems for high-resolution flat panel applications. It pro-

Generalized Transmitter Block Diagram

10132002

TRI-STATE^®is a registered trademark of National Semiconductor Corporation.

DS101320

www.national.com

12 3 4 5 6 7...19

中文翻译

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DS90CF388AVJD 替代型号

型号	品牌	替代类型	描述	数据表
DS90CF388VJD	NSC	功能相似	Dual Pixel LVDS Display Interface (LDI)-SVGA/QXGA

与DS90CF388AVJD相关器件

型号	品牌	获取价格	描述	数据表
DS90CF388AVJD/NOPB	NSC	获取价格	IC 9 LINE RECEIVER, PQFP100, TQFP-100, Line Driver or Receiver
DS90CF388AVJD/NOPB	TI	获取价格	双像素 LVDS 显示接口/ FPD 链接接收器 \| NEZ \| 100 \| -10 to
DS90CF388VJD	NSC	获取价格	Dual Pixel LVDS Display Interface (LDI)-SVGA/QXGA
DS90CF388VJD/NOPB	TI	获取价格	+3.3V 双像素 LVDS 显示接口 (LDI)-SVGA/QXGA 接收器 \| NEZ
DS90CF388VJDX	NSC	获取价格	IC 9 LINE RECEIVER, PQFP100, TQFP-100, Line Driver or Receiver
DS90CF388VJDX/NOPB	NSC	获取价格	IC 9 LINE RECEIVER, PQFP100, TQFP-100, Line Driver or Receiver
DS90CF388VJDX/NOPB	TI	获取价格	+3.3V 双像素 LVDS 显示接口 (LDI)-SVGA/QXGA 接收器 \| NEZ
DS90CF561	NSC	获取价格	LVDS 18-Bit Color Flat Panel Display (FPD) Link
DS90CF561MDC	NSC	获取价格	IC TRIPLE LINE DRIVER, UUC, DIE, Line Driver or Receiver
DS90CF561MTD	NSC	获取价格	LVDS 18-Bit Color Flat Panel Display (FPD) Link

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