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DS90CF384MTD PDF预览

DS90CF384MTD

更新时间： 2024-09-08 22:50:51
品牌 Logo 应用领域
美国国家半导体 - NSC 线路驱动器或接收器显示器驱动程序和接口接口集成电路光电二极管
页数 文件大小 规格书
20页 368K
描述
+3.3V Programmable LVDS Transmitter 24-Bit Flat Panel Display (FPD) Link-65 MHz, +3.3V LVDS Receiver 24-Bit Flat Panel Display (FPD) Link-65 MHz

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中文翻译

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DS90CF384MTD 技术参数

是否Rohs认证：不符合生命周期：Transferred
包装说明：PLASTIC, TSSOP-56Reach Compliance Code：not_compliant
ECCN代码：EAR99HTS代码：8542.39.00.01
风险等级：5.22Is Samacsys：N
输入特性：DIFFERENTIAL接口集成电路类型：LINE RECEIVER
接口标准：EIA-644; TIA-644JESD-30 代码：R-PDSO-G56
JESD-609代码：e0长度：14 mm
湿度敏感等级：2功能数量：4
端子数量：56最高工作温度：85 °C
最低工作温度：-40 °C封装主体材料：PLASTIC/EPOXY
封装代码：TSSOP封装等效代码：TSSOP56,.3,20
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度（摄氏度）：235电源：3.3 V
认证状态：Not Qualified最大接收延迟：
接收器位数：4座面最大高度：1.2 mm
子类别：Line Driver or Receivers标称供电电压：3.3 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子面层：Tin/Lead (Sn/Pb)
端子形式：GULL WING端子节距：0.5 mm
端子位置：DUAL处于峰值回流温度下的最长时间：30
宽度：6.1 mmBase Number Matches：1

DS90CF384MTD 数据手册

 浏览型号DS90CF384MTD的Datasheet PDF文件第2页浏览型号DS90CF384MTD的Datasheet PDF文件第3页浏览型号DS90CF384MTD的Datasheet PDF文件第4页浏览型号DS90CF384MTD的Datasheet PDF文件第5页浏览型号DS90CF384MTD的Datasheet PDF文件第6页浏览型号DS90CF384MTD的Datasheet PDF文件第7页 
November 2000  
DS90C383/DS90CF384  
+3.3V Programmable LVDS Transmitter 24-Bit Flat Panel  
Display (FPD) Link—65 MHz, +3.3V LVDS Receiver  
24-Bit Flat Panel Display (FPD) Link—65 MHz  
General Description  
Features  
n 20 to 65 MHz shift clock support  
n Programmable transmitter (DS90C383) strobe select  
(Rising or Falling edge strobe)  
The DS90C383 transmitter converts 28 bits of LVCMOS/  
LVTTL data into four LVDS (Low Voltage Differential Signal-  
ing) data streams. A phase-locked transmit clock is transmit-  
ted in parallel with the data streams over a fifth LVDS link.  
Every cycle of the transmit clock 28 bits of input data are  
sampled and transmitted. The DS90CF384 receiver con-  
verts the LVDS data streams back into 28 bits of LVCMOS/  
LVTTL data. At a transmit clock frequency of 65 MHz, 24 bits  
of RGB data and 3 bits of LCD timing and control data  
(FPLINE, FPFRAME, DRDY) are transmitted at a rate of 455  
Mbps per LVDS data channel. Using a 65 MHz clock, the  
data throughputs is 227 Mbytes/sec. The transmitter is of-  
fered with programmable edge data strobes for convenient  
interface with a variety of graphics controllers. The transmit-  
ter can be programmed for Rising edge strobe or Falling  
edge strobe through a dedicated pin. A Rising edge trans-  
n Single 3.3V supply  
n Chipset (Tx + Rx) power consumption 250 mW (typ)  
n Power-down mode ( 0.5 mW total)  
<
<
n Single pixel per clock XGA (1024x768) ready  
n Supports VGA, SVGA, XGA and higher addressability.  
n Up to 227 Megabytes/sec bandwidth  
n Up to 1.8 Gbps throughput  
n Narrow bus reduces cable size and cost  
n 290 mV swing LVDS devices for low EMI  
n PLL requires no external components  
n Low profile 56-lead TSSOP package.  
n Also available in a 64 ball, 0.8mm fine pitch ball grid  
array (FBGA) package  
mitter will inter-operate with  
a Falling edge receiver  
(DS90CF384) without any translation logic. Both devices are  
also offered in a 64 ball, 0.8mm fine pitch ball grid array  
(FBGA) package which provides a 44 % reduction in PCB  
footprint compared to the TSSOP package.  
n Falling edge data strobe Receiver  
n Compatible with TIA/EIA-644 LVDS standard  
>
n ESD rating 7 kV  
n Operating Temperature: −40˚C to +85˚C  
This chipset is an ideal means to solve EMI and cable size  
problems associated with wide, high speed TTL interfaces.  
Block Diagrams  
Typical Application  
DS012887-2  
TRI-STATE® is a registered trademark of National Semiconductor Corporation.  
© 2000 National Semiconductor Corporation  
DS012887  
www.national.com  
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DS90CF384MTD 替代型号

型号 品牌 替代类型 描述 数据表
DS90CF384MTDX/NOPB TI

功能相似

 +3.3V LVDS 接收器 24 位平板显示器 (FPD) 链路 - 65MHz | D
DS90CF384MTDX TI

功能相似

 QUAD LINE RECEIVER, PDSO56, LOW PROFILE, PLASTIC, TSSOP-56

与DS90CF384MTD相关器件

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DS90CF384MTD/NOPB TI

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 		+3.3V LVDS 接收器 24 位平板显示器 (FPD) 链路 - 65MHz | D
DS90CF384MTDX TI

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 		QUAD LINE RECEIVER, PDSO56, LOW PROFILE, PLASTIC, TSSOP-56
DS90CF384MTDX/NOPB NSC

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 		IC QUAD LINE RECEIVER, PDSO56, LOW PROFILE, PLASTIC, TSSOP-56, Line Driver or Receiver
DS90CF384MTDX/NOPB TI

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 		+3.3V LVDS 接收器 24 位平板显示器 (FPD) 链路 - 65MHz | D
DS90CF384SLC NSC

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 		+3.3V Programmable LVDS Transmitter 24-Bit Flat Panel Display (FPD) Link-65 MHz, +3.3V LVD
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DS90CF386 TI

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 		+3.3V LVDS 接收器 24 位平板显示器 (FPD) 链路 - 85MHz
DS90CF386 NSC

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 		+3.3V LVDS Receiver 24-Bit Flat Panel Display (FPD) Link?85 MHz, +3.3V LVDS Receiver 18-Bi
DS90CF386MTD NSC

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 		+3.3V LVDS Receiver 24-Bit Flat Panel Display (FPD) Link?85 MHz, +3.3V LVDS Receiver 18-Bi
DS90CF386MTD TI

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 		+3.3V LVDS 接收器 24 位平板显示器 (FPD) 链路 - 85MHz | D

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