Datasheet > 驱动程序和接口 > 线路驱动器或接收器> DS90CF383BMT-NOPB

DS90CF383BMT-NOPB

更新时间： 2024-09-09 12:52:43

品牌	Logo	应用领域
德州仪器 - TI		显示器光电二极管
页数	文件大小	规格书
15页	975K
描述
Programmable LVDS Transmitter 24-Bit Flat Panel Display (FPD) Link-65 MHz

阅读下载

中文翻译

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

DS90CF383BMT-NOPB 数据手册

浏览型号DS90CF383BMT-NOPB的Datasheet PDF文件第2页

浏览型号DS90CF383BMT-NOPB的Datasheet PDF文件第3页

浏览型号DS90CF383BMT-NOPB的Datasheet PDF文件第4页

浏览型号DS90CF383BMT-NOPB的Datasheet PDF文件第5页

浏览型号DS90CF383BMT-NOPB的Datasheet PDF文件第6页

浏览型号DS90CF383BMT-NOPB的Datasheet PDF文件第7页

DS90C383B

www.ti.com

SNLS177G –APRIL 2004–REVISED APRIL 2013

Programmable LVDS Transmitter 24-Bit Flat Panel Display (FPD) Link-65 MHz

Check for Samples: DS90C383B

FEATURES

•

PLL requires no external components

Compatible with TIA/EIA-644 LVDS standard

Low profile 56-lead TSSOP package

Improved replacement for:

•

No special start-up sequence required

between clock/data and /PD pins. Input signal

(clock and data) can be applied either before

or after the device is powered

–

SN75LVDS83, DS90C383A

•

Support Spread Spectrum Clocking up to

100kHz frequency modulation and deviations

of ±2.5% center spread or -5% down spread

DESCRIPTION

The DS90C383B transmitter converts 28 bits of

CMOS/TTL data into four LVDS (Low Voltage

Differential Signaling) data streams. A phase-locked

transmit clock is transmitted in parallel with the data

streams over a fifth LVDS link. Every cycle of the

transmit clock 28 bits of input data are sampled and

transmitted. At a transmit clock frequency of 65 MHz,

24 bits of RGB data and 3 bits of LCD timing and

control data (FPLINE, FPFRAME, DRDY) are

transmitted at a rate of 455 Mbps per LVDS data

channel. Using a 65 MHz clock, the data throughput

is 227 Mbytes/sec. The DS90C383B transmitter can

be programmed for Rising edge strobe or Falling

edge strobe through a dedicated pin. A Rising edge

or Falling edge strobe transmitter will interoperate

with a Falling edge strobe Receiver (DS90CF386)

without any translation logic.

"Input Clock Detection" feature will pull all

LVDS pairs to logic low when input clock is

missing and when /PD pin is logic high

•

18 to 68 MHz shift clock support

Best-in-Class Setup and Hold Times on

TxINPUTs

•

Tx power consumption < 130 mW (typ) at

65MHz Grayscale

40% Less Power Dissipation than BiCMOS

Alternatives

•

Tx Power-down mode < 60μW (typ)

Supports VGA, SVGA, XGA and Dual Pixel

SXGA.

•

Narrow bus reduces cable size and cost

Up to 1.8 Gbps throughput

This chipset is an ideal means to solve EMI and

cable size problems associated with wide, high speed

TTL interfaces.

Up to 227 Megabytes/sec bandwidth

345 mV (typ) swing LVDS devices for low EMI

Block Diagram

Figure 1. DS90C383B

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

TRI-STATE is a registered trademark of Texas Instruments.

All other trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

12 3 4 5 6 7...15

中文翻译

下载PDF

与DS90CF383BMT-NOPB相关器件

型号	品牌	获取价格	描述	数据表
DS90CF383BMTX	TI	获取价格	3.3V Programmable LVDS Transmitter 24-Bit Flat Panel Display (FPD) Link-65 MHz
DS90CF383BMTX/NOPB	TI	获取价格	3.3V Programmable LVDS Transmitter 24-Bit Flat Panel Display (FPD) Link-65 MHz
DS90CF383BMTX/NOPB	NSC	获取价格	IC LINE DRIVER, PDSO56, TSSOP-56, Line Driver or Receiver
DS90CF383MTD	NSC	获取价格	+3.3V LVDS Transmitter 24-Bit Flat Panel Disp
DS90CF383MTD/NOPB	NSC	获取价格	IC LINE DRIVER, PDSO56, PLASTIC, TSSOP-56, Line Driver or Receiver
DS90CF383MTDX/NOPB	NSC	获取价格	IC LINE DRIVER, PDSO56, LOW PROFILE, PLASTIC, TSSOP-56, Line Driver or Receiver
DS90CF384	NSC	获取价格	+3.3V Programmable LVDS Transmitter 24-Bit Flat Panel Display (FPD) Link-65 MHz, +3.3V LVD
DS90CF384	TI	获取价格	+3.3V LVDS 接收器 24 位平板显示器 (FPD) 链路 - 65MHz
DS90CF384A	NSC	获取价格	+3.3V LVDS Receiver 24-Bit Flat Panel Display
DS90CF384A	TI	获取价格	DS90CF384A/DS90CF364A 3.3V LVDS Receiver 24-Bit Flat Panel Display (FPD) Link - 65 MHz, 3.

与DS90CF383BMT-NOPB相关文章

SL74HC10N：高性能三输入与非门解析
2024-09-03

66
AIC1781A 电池充电控制器深度解析
2024-09-03

56
Pickering新高压舌簧继电器亮相汽车测试博览会
2024-08-26

90
采用MCU+MPU双处理器架构实现的创新应用设计探索
2024-08-23

102

产品中心

服务支持

精选活动

关于我们

帮助中心

DS90CF383BMT-NOPB

DS90CF383BMT-NOPB 数据手册

与DS90CF383BMT-NOPB相关器件

与DS90CF383BMT-NOPB相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

DS90CF383BMT-NOPB

DS90CF383BMT-NOPB 数据手册

与DS90CF383BMT-NOPB相关器件

与DS90CF383BMT-NOPB相关文章

您还可以找

您在本页遇到什么问题？