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DS90CF364MTD

更新时间： 2024-09-14 22:50:51
品牌 Logo 应用领域
美国国家半导体 - NSC 显示器光电二极管
页数 文件大小 规格书
16页 289K
描述
+3.3V Programmable LVDS Transmitter 18-Bit Flat Panel Display (FPD) LinkΑ65 MHz, +3.3V LVDS Receiver 18-Bit Flat Panel Display (FPD) LinkΑ65 MHz

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DS90CF364MTD 技术参数

是否Rohs认证： 不符合生命周期：Transferred
包装说明：TSSOP-48Reach Compliance Code：not_compliant
ECCN代码：EAR99HTS代码：8542.39.00.01
风险等级：5.12差分输出：NO
输入特性：DIFFERENTIAL接口集成电路类型：LINE RECEIVER
接口标准：EIA-644; TIA-644JESD-30 代码：R-PDSO-G48
JESD-609代码：e0长度：12.5 mm
湿度敏感等级：2功能数量：4
端子数量：48最高工作温度：85 °C
最低工作温度：-40 °C输出特性：TOTEM-POLE
输出极性：TRUE封装主体材料：PLASTIC/EPOXY
封装代码：TSSOP封装等效代码：TSSOP48,.3,20
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度（摄氏度）：235电源：3.3 V
认证状态：Not Qualified最大接收延迟：
接收器位数：4座面最大高度：1.1 mm
子类别：Line Driver or Receivers最大压摆率：105 mA
最大供电电压：3.6 V最小供电电压：3 V
标称供电电压：3.3 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子面层：Tin/Lead (Sn/Pb)端子形式：GULL WING
端子节距：0.5 mm端子位置：DUAL
处于峰值回流温度下的最长时间：30宽度：6.1 mm
Base Number Matches：1

DS90CF364MTD 数据手册

 浏览型号DS90CF364MTD的Datasheet PDF文件第2页浏览型号DS90CF364MTD的Datasheet PDF文件第3页浏览型号DS90CF364MTD的Datasheet PDF文件第4页浏览型号DS90CF364MTD的Datasheet PDF文件第5页浏览型号DS90CF364MTD的Datasheet PDF文件第6页浏览型号DS90CF364MTD的Datasheet PDF文件第7页 
September 1999  
DS90C363/DS90CF364  
+3.3V Programmable LVDS Transmitter 18-Bit Flat Panel  
Display (FPD) Link—65 MHz, +3.3V LVDS Receiver  
18-Bit Flat Panel Display (FPD) Link—65 MHz  
General Description  
Features  
n 20 to 65 MHz shift clock support  
n Programmable Transmitter (DS90C363) strobe select  
(Rising or Falling edge strobe)  
The DS90C363 transmitter converts 21 bits of CMOS/TTL  
data into three LVDS (Low Voltage Differential Signaling)  
data streams. A phase-locked transmit clock is transmitted in  
parallel with the data streams over a fourth LVDS link. Every  
cycle of the transmit clock 21 bits of input data are sampled  
and transmitted. The DS90CF364 receiver converts the  
LVDS data streams back into 21 bits of CMOS/TTL data. At  
a transmit clock frequency of 65 MHz, 18 bits of RGB data  
n Single 3.3V supply  
n Chipset (Tx + Rx) power consumption 250 mW (typ)  
n Power-down mode ( 0.5 mW total)  
n Single pixel per clock XGA (1024x768) ready  
n Supports VGA, SVGA, XGA and higher addressability.  
n Up to 170 Megabyte/sec bandwidth  
<
<
and  
3 bits of LCD timing and control data (FPLINE,  
FPFRAME, DRDY) are transmitted at a rate of 455 Mbps per  
LVDS data channel. Using a 65 MHz clock, the data through-  
puts is 170 Mbytes/sec. The Transmitter is offered with pro-  
grammable edge data strobes for convenient interface with a  
variety of graphics controllers. The Transmitter can be pro-  
grammed for Rising edge strobe or Falling edge strobe  
through a dedicated pin. A Rising edge Transmitter will inter-  
operate with a Falling edge Receiver (DS90CF364) without  
any translation logic.  
n Up to 1.3 Gbps throughput  
n Narrow bus reduces cable size and cost  
n 290 mV swing LVDS devices for low EMI  
n PLL requires no external components  
n Low profile 48-lead TSSOP package  
n Falling edge data strobe Receiver  
n Compatible with TIA/EIA-644 LVDS standard  
>
n ESD rating 7 kV  
This chipset is an ideal means to solve EMI and cable size  
problems associated with wide, high speed TTL interfaces.  
n Operating Temperature: −40˚C to +85˚C  
Block Diagrams  
Application  
DS012886-14  
TRI-STATE® is a registered trademark of National Semiconductor Corporation.  
© 1999 National Semiconductor Corporation  
DS012886  
www.national.com  
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DS90CF364MTD 替代型号

型号 品牌 替代类型 描述 数据表
DS90CF364AMTD/NOPB TI

功能相似

 +3.3V LVDS 接收器 18 位平板显示器 (FPD) 链路 - 65MHz | D
DS90CF364MTD/NOPB TI

功能相似

 3.3V Programmable LVDS Transmitter 18-Bit Fla
DS90CF364MTDX/NOPB TI

功能相似

 +3.3V LVDS Receiver 18-Bit Flat Panel Display (FPD) Link - 65 MHz 48-TSSOP -40 to 85

与DS90CF364MTD相关器件

型号 品牌 获取价格 描述 数据表
DS90CF364MTD/NOPB NSC

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 		IC QUAD LINE RECEIVER, PDSO48, PLASTIC, TSSOP-48, Line Driver or Receiver
DS90CF364MTD/NOPB TI

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 		3.3V Programmable LVDS Transmitter 18-Bit Fla
DS90CF364MTDX ETC

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 		Video Link Interface
DS90CF364MTDX/NOPB TI

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 		+3.3V LVDS Receiver 18-Bit Flat Panel Display (FPD) Link - 65 MHz 48-TSSOP -40 to 85
DS90CF364MTDX/NOPB NSC

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 		IC QUAD LINE RECEIVER, PDSO48, LOW PROFILE, PLASTIC, TSSOP-48, Line Driver or Receiver
DS90CF366 NSC

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 		+3.3V LVDS Receiver 24-Bit Flat Panel Display (FPD) Link?85 MHz, +3.3V LVDS Receiver 18-Bi
DS90CF366 TI

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 		20 to 85 MHz Shift Clock Support, Rx Power Consumption <142 mW (typ) @85MHz Grayscale
DS90CF366_06 NSC

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 		+3.3V LVDS Receiver 24-Bit Flat Panel Display (FPD) Link-85MHz, +3.3V LVDS Receiver 18-Bit
DS90CF366MTD NSC

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 		+3.3V LVDS Receiver 24-Bit Flat Panel Display (FPD) Link?85 MHz, +3.3V LVDS Receiver 18-Bi
DS90CF366MTD/NOPB TI

获取价格

 		+3.3V LVDS Receiver 18-Bit Flat Panel Display (FPD) Link - 85 MHz 48-TSSOP -10 to 70

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