5秒后页面跳转
DS90CF363BMT PDF预览

DS90CF363BMT

更新时间: 2024-09-14 12:34:43
品牌 Logo 应用领域
德州仪器 - TI 显示器光电二极管
页数 文件大小 规格书
15页 900K
描述
3.3V Programmable LVDS Transmitter 18-Bit Flat Panel Display (FPD) Link -65 MHz

DS90CF363BMT 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:TSSOP
包装说明:TSSOP, TSSOP48,.3,20针数:48
Reach Compliance Code:not_compliantECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.1
差分输出:YES驱动器位数:4
输入特性:STANDARD接口集成电路类型:LINE DRIVER
接口标准:EIA-644; TIA-644JESD-30 代码:R-PDSO-G48
JESD-609代码:e0长度:12.5 mm
湿度敏感等级:2功能数量:1
端子数量:48最高工作温度:70 °C
最低工作温度:-10 °C封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP48,.3,20
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度):235电源:3.3 V
认证状态:Not Qualified最大接收延迟:
座面最大高度:1.1 mm子类别:Line Driver or Receivers
最大压摆率:55 mA最大供电电压:3.6 V
最小供电电压:3 V标称供电电压:3.3 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子面层:Tin/Lead (Sn/Pb)
端子形式:GULL WING端子节距:0.5 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:6.1 mmBase Number Matches:1

DS90CF363BMT 数据手册

 浏览型号DS90CF363BMT的Datasheet PDF文件第2页浏览型号DS90CF363BMT的Datasheet PDF文件第3页浏览型号DS90CF363BMT的Datasheet PDF文件第4页浏览型号DS90CF363BMT的Datasheet PDF文件第5页浏览型号DS90CF363BMT的Datasheet PDF文件第6页浏览型号DS90CF363BMT的Datasheet PDF文件第7页 
DS90CF363B  
www.ti.com  
SNLS180D JULY 2004REVISED APRIL 2013  
+3.3V Programmable LVDS Transmitter 18-Bit Flat Panel Display (FPD) Link -65 MHz  
Check for Samples: DS90CF363B  
1
FEATURES  
345 mV (typ) Swing LVDS Devices for Low EMI  
PLL Requires no External Components  
Compatible with TIA/EIA-644 LVDS Standard  
Low Profile 48-lead TSSOP Package  
Improved Replacement for:  
2
No Special Start-up Sequence Required  
between Clock/Data and /PD Pins. Input Signal  
(Clock and Data) can be Applied Either Before  
or After the Device is Powered.  
Support Spread Spectrum Clocking up to  
100KHz Frequency Modulation & Deviations of  
±2.5% Center Spread or 5% Down Spread.  
SN75LVDS84, DS90CF363A  
DESCRIPTION  
"Input Clock Detection" Feature will Pull all  
LVDS Pairs to Logic Low when Input Clock is  
Missing and when /PD Pin is Logic High.  
The DS90CF363B transmitter converts 21 bits of  
CMOS/TTL data into three LVDS (Low Voltage  
Differential Signaling) data streams. A phase-locked  
transmit clock is transmitted in parallel with the data  
streams over a fourth LVDS link. Every cycle of the  
transmit clock 21 bits of input data are sampled and  
transmitted. At a transmit clock frequency of 65 MHz,  
18 bits of RGB data and 3 bits of LCD timing and  
control data (FPLINE, FPFRAME, DRDY) are  
transmitted at a rate of 455 Mbps per LVDS data  
channel. Using a 65 MHz clock, the data throughput  
is 170 Mbytes/sec. The DS90CF363B is fixed as a  
Falling edge strobe transmitter and will interoperate  
with a Falling edge strobe Receiver (DS90CF366)  
without any translation logic.  
18 to 68 MHz Shift Clock Support  
Best–in–Class Set & Hold Times on TxINPUTs  
Tx Power Consumption < 130 mW (typ)  
@65MHz Grayscale  
40% Less Power Dissipation than BiCMOS  
Alternatives  
Tx Power-Down Mode < 37μW (typ)  
Supports VGA, SVGA, XGA and Dual Pixel  
SXGA.  
Narrow Bus Reduces Cable Size and Cost  
Up to 1.3 Gbps Throughput  
This chipset is an ideal means to solve EMI and  
cable size problems associated with wide, high speed  
TTL interfaces.  
Up to 170 Megabytes/sec Bandwidth  
Block Diagram  
Figure 1. DS90CF363B  
See Package Number DGG0048A  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
All trademarks are the property of their respective owners.  
2
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2004–2013, Texas Instruments Incorporated  

DS90CF363BMT 替代型号

型号 品牌 替代类型 描述 数据表
DS90C365AMTX/NOPB TI

完全替代

+3.3V 可编程 LVDS 发送器 18 位平板显示器链路 - 87.5MHz | DG
DS90C365AMT/NOPB TI

功能相似

+3.3V 可编程 LVDS 发送器 18 位平板显示器链路 - 87.5MHz | DG

与DS90CF363BMT相关器件

型号 品牌 获取价格 描述 数据表
DS90CF363BMT/NOPB TI

获取价格

+3.3V 下降沿 LVDS 发送器 18 位平板显示器 (FPD) 链路 - 65MHz
DS90CF363BMTX TI

获取价格

3.3V Programmable LVDS Transmitter 18-Bit Flat Panel Display (FPD) Link -65 MHz
DS90CF363BMTX/NOPB TI

获取价格

+3.3V 下降沿 LVDS 发送器 18 位平板显示器 (FPD) 链路 - 65MHz
DS90CF363MDC NSC

获取价格

暂无描述
DS90CF363MTD NSC

获取价格

+3.3V LVDS Transmitter 18-Bit Flat Panel Disp
DS90CF363MTDX NSC

获取价格

IC TRIPLE LINE DRIVER, PDSO48, LOW PROFILE, PLASTIC, TSSOP-48, Line Driver or Receiver
DS90CF364 NSC

获取价格

+3.3V LVDS Receiver 24-Bit Flat Panel Display
DS90CF364 TI

获取价格

+3.3V LVDS 接收器 18 位平板显示器 (FPD) 链路 - 65MHz
DS90CF364A NSC

获取价格

+3.3V LVDS Receiver 24-Bit Flat Panel Display (FPD) Link-65MHz, +3.3V LVDS Receiver 18-Bit
DS90CF364A TI

获取价格

DS90CF384A/DS90CF364A 3.3V LVDS Receiver 24-Bit Flat Panel Display (FPD) Link - 65 MHz, 3.